PEB3086FV14XT Infineon Technologies, PEB3086FV14XT Datasheet - Page 70
PEB3086FV14XT
Manufacturer Part Number
PEB3086FV14XT
Description
Manufacturer
Infineon Technologies
Datasheet
1.PEB3086FV14XT.pdf
(262 pages)
Specifications of PEB3086FV14XT
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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ISAC-SX
PEB 3086
Description of Functional Blocks
3.4.3
Oscillator Clock Output C768
The ISAC-SX derives its system clocks from an external clock connected to XTAL1
(while XTAL2 is not connected) or from a 7.68 MHz crystal connected across XTAL1 and
XTAL2.
At pin C768 a buffered 7.68 MHz output clock is provided to drive further devices, which
is suitable in multiline applications for example (see
Figure
36). This clock is not
synchronized to the S-interface.
In power down mode the C768 output is disabled (low signal).
7.68
MHz
n.c.
n.c.
n.c.
n.c.
XTAL1
XTAL2
C768
XTAL1
XTAL2
C768
XTAL1
XTAL2
C768
3086_12
Figure 36
Buffered Oscillator Clock Output
Data Sheet
70
2003-01-30
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