A3PE-BRD600-SKT MICROSEMI, A3PE-BRD600-SKT Datasheet - Page 31

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A3PE-BRD600-SKT

Manufacturer Part Number
A3PE-BRD600-SKT
Description
MCU, MPU & DSP Development Tools ProASIC3/E Starter Kit
Manufacturer
MICROSEMI
Datasheet

Specifications of A3PE-BRD600-SKT

Processor To Be Evaluated
ProASIC3/E
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Actel VHDL ProASIC3/E Design Flow
ProASIC3/E Starter Kit User’s Guide and Tutorial
This chapter introduces the design flow for VHDL using the Actel Libero IDE software suite. This chapter also briefly
describes how to use the software tools and provides information about the sample design.
VHDL-based design flow.
The Libero IDE design flow has four main components:
• Design Entry
• Design Implementation
• Programming
• System Verification
System Verification
Design Creation/Verification
Design Implementation
Programming
Compile
(only available in Q3)
Macro Builder
Silicon Sculptor
Synthesis
ACTgen
Library
Layout
Figure 6-1. VHDL-Based Design Flow
Bitstream
Design Synthesis and
Fuse
or
Logic Navigator
Optimization
0101
Programming
HDL Editor
Synplify
Netlist
Synthesis
EDIF
File (STP)
Device
Actel
®
x
PinEdit
Netlist
Viewer
TM
User Tools
SmartPower
ChipEdit
WaveFormer Lite
Testbench
Stimulus Generation
Back-Annotate
FlashPro
Functional Simulation
Timer
Timing Simulation
Structural
ModelSim
Simulator
TM
Netlist
HDL
Testbench
Figure 6-1
User
SDF
File
shows the
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