PIC24FJ32GA002-I/SO Microchip Technology Inc., PIC24FJ32GA002-I/SO Datasheet - Page 167

• Manufacturer Part Number: PIC24FJ32GA002-I/SO
• Description: MCU, 16-Bit, 28-Pin, 32KB Flash, 8KB RAM, 21 I/O, Nanowatt
• Manufacturer: Microchip Technology Inc.

Specifications of PIC24FJ32GA002-I/SO

• A/d Inputs: 10 Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 16 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 21
• Interface: I2C/SPI/UART
• Memory Capacity: 32 Kbytes
• Memory Type: Flash
• Number Of Bits: 16
• Number Of Inputs: 21
• Number Of Pins: 28
• Package Type: 28-pin SOIC
• Programmable Memory: 32K Bytes
• Ram Size: 8K Bytes
• Speed: 32 MHz
• Timers: 5-16-bit
• Voltage, Range: 2-3.6 V
• Voltage, Rating: 2-3.6 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 17-3:
REGISTER 17-4:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-11
bit 10-0
Note 1:
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-11
bit 10-2
bit 1-0
Note 1:
PTEN7
R/W-0
R/W-0
U-0
U-0
—
—
(1)
Devices with 28 pins do not have PMA<10:2>.
Devices with 28 pins do not have PMA<10:2>.
Unimplemented: Read as ‘0’
CS1: Chip Select 1 bit
1 = Chip select 1 is active
0 = Chip select 1 is inactive
Unimplemented: Read as ‘0’
ADDR10:ADDR0: Parallel Port Destination Address bits
Unimplemented: Read as ‘0’
PTEN14: PMCS1 Strobe Enable bit
1 = PMCS1 functions as chip select
0 = PMCS1 pin functions as port I/O
Unimplemented: Read as ‘0’
PTEN10:PTEN2: PMP Address Port Enable bits
1 = PMA<10:2> function as PMP address lines
0 = PMA<10:2> function as port I/O
PTEN1:PTEN0: PMALH/PMALL Strobe Enable bits
1 = PMA1 and PMA0 function as either PMA<1:0> or PMALH and PMALL
0 = PMA1 and PMA0 pads functions as port I/O
PTEN6
PTEN14
R/W-0
R/W-0
R/W-0
R/W-0
CS1
PMADDR: PARALLEL PORT ADDRESS REGISTER
PMAEN: PARALLEL PORT ENABLE REGISTER
(1)
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
PTEN5
R/W-0
R/W-0
U-0
U-0
—
—
(1)
PTEN4
R/W-0
R/W-0
PIC24FJ64GA004 FAMILY
U-0
U-0
Preliminary
—
—
ADDR<7:0>
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PTEN3
R/W-0
R/W-0
(1)
U-0
U-0
—
—
(1)
(1)
(1)
PTEN10
PTEN2
R/W-0
R/W-0
R/W-0
R/W-0
(1)
(1)
ADDR<10:8>
x = Bit is unknown
x = Bit is unknown
PTEN9
PTEN1
R/W-0
R/W-0
R/W-0
R/W-0
(1)
DS39881B-page 165
(1)
PTEN8
PTEN0
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0
bit 8
bit 0
(1)