LM5068MM-2/HALF National Semiconductor, LM5068MM-2/HALF Datasheet - Page 13

• Manufacturer Part Number: LM5068MM-2/HALF
• Manufacturer: National Semiconductor

Specifications of LM5068MM-2/HALF

• Lead Free Status / Rohs Status: Supplier Unconfirmed

UV and OV Thresholds and
Voltage Divider Selection for R1,
R2, and R3
Hysteresis is necessary to prevent a possible “chattering”
condition when the controller enables or disables the exter-
nal MOSFET. The change in line current interacts with the
line impedance. This interaction can cause several rapid
on/off cycles on the MOSFET. A hysteresis window larger
than the line impedance voltage drop prevents this condition.
The impedance seen looking into the resistor divider from
the UV and OV pin determines the hysteresis level. UV/OV
ON and OFF thresholds are calculated as follow:
The independent UV and OV pins provide complete flexibility
for the user to select the operational voltage range of the
system. However, due to the UV Abs Max rating, the UV and
OV thresholds can’t be simultaneously set to extremes in
one resistor string. For the wide ranges of input voltages (i.e.
UV threshold to12V and OV threshold to 90V) it is recom-
mended to use two separate voltage dividers to set the UV
and OV thresholds independently.
The typical operating ranges of under-voltage and over-
voltage thresholds are calculated from the above equations
with known resistors. For example, for resistor values:
R1=130KΩ, R2=5.5KΩ, and R3=4.5KΩ, the computed
thresholds are:
To maintain the threshold’s accuracy, a resistor tolerance of
1% or better is recommended.
Calculation of Normal, Circuit
Breaker, and Retry Timing
The C
tions of the LM5068. When the interlock conditions are met
the timer capacitor is charged to 4V in a slow initial delay
time period t
• UV turn-on = 37.60V
• UV turn-off = 35.0V
• OV turn-off = 77.78V
• OV turn-on = 75.07V
T
capacitor at the TIMER pin controls the timing func-
IDT
calculated from:
(Continued)
13
If the SENSE pin detects more than 50mV across R
TIMER pin charges C
timeout period t
When the LM5068-2 or LM5068-4 is latched, it pulls down
the GATE pin and initiates eight, 6µA charging cycles be-
tween 1V and 4V on C
given by:
Sense Resistor (R
Capacitor (C
Mosfet (Q1) Selection
To select the proper MOSFET, the following safe operating
area (SOA) parameters are needed: maximum input voltage,
maximum current and the maximum current conduction time.
First, R
rent (I
(V
During the initial charging process, the LM5068 may operate
the MOSFET in current limit, forcing V
V
The minimum in-rush current and maximum short-circuit limit
are calculated from:
The value of TIMER capacitor (C
prevent C
charged using the slowest expected charging rate of the load
capacitor. Assuming there is no initial resistive loading, the
time necessary to charge the load capacitor C
from:
AC(MAX)
CB(MIN)
L(MAX)
S
(120mV) across R
):
is calculated for the maximum operating load cur-
T
from timing out before the load capacitor is fully
) and the minimum circuit breaker trip point
CBT
is calculated from:
T
) and N-Channel
T
T
. The total re-try time period t
with 240µA. The Circuit Breaker
S
.
s
), Timer
T
) is calculated in order to
AC(MIN)
L
is calculated
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(80mV) to
S
, the
RT
(1)
(2)
(3)
(4)
(5)
(6)
(7)
is