CLC5526PCASM/NOPB National Semiconductor, CLC5526PCASM/NOPB Datasheet - Page 4

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CLC5526PCASM/NOPB

Manufacturer Part Number
CLC5526PCASM/NOPB
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of CLC5526PCASM/NOPB

Lead Free Status / Rohs Status
Compliant
www.national.com
DIGITAL INPUTS/TIMING
V
V
T
T
T
POWER REQUIREMENTS
I
CC
Symbol
SU
HOLD
PW
IL
IH
Electrical Characteristics
Note 1: “Absolute Maximum Ratings” are limited values, to be applied individually, and beyond which the serviceability of the circuit may be impaired. Functional
operability under any of these conditions is not necessarily implied. Exposure to maximum ratings for extended periods may affect device reliability.
Note 2: Limits are 100% tested at 25˚C.
Note 3: Typical specifications are the mean values of the distributions of deliverable amplifiers tested to date.
Note 4: Outgoing quality levels are determined from tested parameters.
The following specifications apply for V
−40˚C to T
Maximum Gain
Minimum Gain
Gain Step Size
Gain Step Accuracy
Cumulative Gain Step Error
Logic Compatibility
Logic Input Low Voltage
Logic Input High Voltage
Setup Time
Hold Time
Minimum Pulse Width
+5V Supply Current
Shutdown
max
= +85˚C, all other limits T
Parameter
CC
A
= +5V, R
(Continued)
= 25˚C (Notes 2, 3, 4).
(1 sigma)
(1 sigma)
L
= 1 kΩ maximum gain setting. Boldface limits apply for T
Conditions
4
Min
2.0
TTL/CMOS
0.085
6.02
0.03
Typ
−12
30
48
3
3
3
9
Max
0.8
60
A
= T
min
Units
mA
mA
=
dB
dB
dB
dB
dB
ns
ns
ns
V
V
V