DK-PCIE-2SGX90N/UNIV Altera, DK-PCIE-2SGX90N/UNIV Datasheet - Page 22

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DK-PCIE-2SGX90N/UNIV

Manufacturer Part Number
DK-PCIE-2SGX90N/UNIV
Description
Manufacturer
Altera
Datasheet

Specifications of DK-PCIE-2SGX90N/UNIV

Lead Free Status / Rohs Status
Supplier Unconfirmed
Download Example Design SOF and View State Machine Status
Download
Example Design
SOF and View
State Machine
Status
A–2
PCI Express Development Kit, Stratix II GX Edition
f
f
The USB-Blaster download cable driver must be installed before the
USB-Blaster download cable can be used. For information about
installing the USB-Blaster download cable driver included with the
Quartus II software, refer to the USB-Blaster Download Cable User Guide.
The driver files are installed at <quartus-install-dir>
\drivers\usb-blaster.
To program the on-board FPGA with the example design file and view
the state machine status via the Quartus II software’s SignalTap
Analyzer, use the following steps:
1.
2.
3.
4.
After the board powers up, the on-board flash memory—which ships
pre-programmed with the factory design—automatically configures the
Stratix II GX device. The CONF DONE LED illuminates, signaling that
the Stratix II GX device is configured.
In
ltssm state machine 0x0F, which indicates that the x8 PCIe MegaCore
function is in the L0 state.
For more information about the SignalTap II Logic Analyzer included
with the Quartus II software, refer to the Design Debugging Using the
SignalTap II Logic Analyzer chapter in volume 3 of the Quartus II
Handbook.
Figure A–1
Start the Quartus II software.
On the Tools menu, click SignalTap II Logic Analyzer.
From the File menu, browse to the <path>\SIIGX_PCIe_ Kit-v1.0.0
\Examples\SII_GX_PCIe_Example_Design directory and open
the PCIe SignalTap II file, SIIGX_PCIe_Example_Design.stp.
From the same directory as the SignalTap II file, download the PCIe
SOF file, SIIGX_PCIe_Example_Design.sof.
Getting Started User Guide
the SignalTap II Logic Analyzer displays the status of the
Altera Corporation
August 2006
®
II Logic
®