MC9S08GW64CLH Freescale Semiconductor, MC9S08GW64CLH Datasheet - Page 12

S08 8bit Microcontroller

MC9S08GW64CLH

Manufacturer Part Number
MC9S08GW64CLH
Description
S08 8bit Microcontroller
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08GW64CLH

Processor Series
MC9S08GW64
Core
S08
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
64 KB
Data Ram Size
4032 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
45
Number Of Timers
3
Operating Supply Voltage
- 0.3 V to + 3.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
60 uA
Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LCD, PWM, WDT
Number Of I /o
57
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 16x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08GW64CLH
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Electrical Characteristics
The average chip-junction temperature (T
where:
For most applications, P
is:
Solving
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring P
for a known T
for any value of T
3.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early CMOS circuits,
normal handling precautions should be taken to avoid exposure to static discharge. Qualification tests are performed to ensure
that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits. During
the device qualification, ESD stresses were performed for the human body model (HBM), the machine model (MM) and the
charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete
DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot
temperature, unless instructed otherwise in the device specification.
12
T
P
P
P
JA
D
int
I/O
A
Equation 1
= Ambient temperature, C
= P
= Package thermal resistance, junction-to-ambient, C/W
= I
= Power dissipation on input and output pins — user determined
ESD Protection and Latch-Up Immunity
A
int
Body Model
DD
. Using this value of K, the values of P
Latch-up
Charge
Model
Human
Device
Model
P
A
 V
.
and
I/O
DD
I/O
Equation 2
, Watts — chip internal power
 P
Series resistance
Storage capacitance
Number of pulses per pin
Series resistance
Storage capacitance
Number of pulses per pin
Minimum input voltage limit
Maximum input voltage limit
int
and can be neglected. An approximate relationship between P
for K gives:
Table 6. ESD and Latch-up Test Conditions
Description
K = P
MC9S08GW64 Series MCU Data Sheet, Rev. 3
J
) in C can be obtained from:
D
P
T
 (T
D
J
= K  (T
= T
A
D
+ 273C) + 
and T
A
+ (P
J
J
+ 273C)
can be obtained by solving
D
 
Symbol
JA
R1
R1
JA
C
C
)
 (P
D
)
2
Value
1500
–2.5
100
200
7.5
Equation 1
3
0
3
D
and T
and
Freescale Semiconductor
J
Equation 2
(if P
Unit
pF
pF
V
V
D
I/O
(at equilibrium)
is neglected)
iteratively
Eqn. 1
Eqn. 2
Eqn. 3

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