PIC32MX320F032H-40V/MR Microchip Technology, PIC32MX320F032H-40V/MR Datasheet - Page 132

• Manufacturer Part Number: PIC32MX320F032H-40V/MR
• Description: 32 KB Flash, 8 KB RAM, 40 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® 32MXr

Specifications of PIC32MX320F032H-40V/MR

• Processor Series: PIC32MX3xx
• Core: MIPS
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• Interface Type: USB, I2C, UART, RS-232, RS-485, SPI
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 5
• Operating Supply Voltage: 2.3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-64
• Operating Temperature Range: - 40 C to + 105 C
• Supply Current (max): 10 mA
• Core Processor: MIPS32® M4K™
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: I²C, IrDA, LIN, PMP, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Eeprom Size: -
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Lead Free Status / Rohs Status: Details

PIC32MX3XX/4XX
REGISTER 26-1:
DS61143H-page 132
bit 19-12 PWP<7:0>: Program Flash Write-Protect bits
bit 11-4
bit 3
bit 2
bit 1-0
Prevents selected program Flash memory pages from being modified during code execution. The PWP bits
represent the one’s compliment of the number of write protected program Flash memory pages.
11111111 = Disabled
11111110 = 0xBD00_0FFF
11111101 = 0xBD00_1FFF
11111100 = 0xBD00_2FFF
11111011 = 0xBD00_3FFF
11111010 = 0xBD00_4FFF
11111001 = 0xBD00_5FFF
11111000 = 0xBD00_6FFF
11110111 = 0xBD00_7FFF
11110110 = 0xBD00_8FFF
11110101 = 0xBD00_9FFF
11110100 = 0xBD00_AFFF
11110011 = 0xBD00_BFFF
11110010 = 0xBD00_CFFF
11110001 = 0xBD00_DFFF
11110000 = 0xBD00_EFFF
11101111 = 0xBD00_FFFF
.
.
.
01111111 = 0xBD07_FFFF
Reserved: Write ‘1’
ICESEL: In-Circuit Emulator/Debugger Communication Channel Select bit
1 = PGEC2/PGED2 pair is used
0 = PGEC1/PGED1 pair is used
Reserved: Write ‘1’
DEBUG<1:0>: Background Debugger Enable bits (forced to ‘11’ if code-protect is enabled)
11 = Debugger disabled
10 = Debugger enabled
00 = Reserved (same as ‘11’ setting)
01 = Reserved (same as ‘11’ setting)
DEVCFG0: DEVICE CONFIGURATION WORD 0 (CONTINUED)
© 2011 Microchip Technology Inc.