PIC32MX320F032H-40V/MR Microchip Technology, PIC32MX320F032H-40V/MR Datasheet - Page 137

32 KB Flash, 8 KB RAM, 40 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE

PIC32MX320F032H-40V/MR

Manufacturer Part Number
PIC32MX320F032H-40V/MR
Description
32 KB Flash, 8 KB RAM, 40 MHz, 10-Bit ADC, DMA 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet

Specifications of PIC32MX320F032H-40V/MR

Processor Series
PIC32MX3xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
8 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-64
Operating Temperature Range
- 40 C to + 105 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
40MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Eeprom Size
-
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
 Details
26.2
This section describes the operation of the WDT and
Power-Up Timer of the PIC32MX3XX/4XX.
The WDT, when enabled, operates from the internal
Low-Power Oscillator (LPRC) clock source and can be
used to detect system software malfunctions by reset-
ting the device if the WDT is not cleared periodically in
software. Various WDT time-out periods can be
selected using the WDT postscaler. The WDT can also
be used to wake the device from Sleep or Idle mode.
The following are some of the key features of the WDT
module:
• Configuration or software controlled
• User-configurable time-out period
• Can wake the device from Sleep or Idle
FIGURE 26-1:
© 2011 Microchip Technology Inc.
WDTCLR = 1
WDT Enable
WDT Enable
Reset Event
Watchdog Timer (WDT)
PWRT Enable
Oscillator
WDT Enable
LPRC
Wake
WATCHDOG AND POWER-UP TIMER BLOCK DIAGRAM
WDT Counter Reset
Clock
25-bit Counter
FWDTPS<4:0>(DEVCFG1<20:16>)
1:64 Output
25
PIC32MX3XX/4XX
1
Decoder
PWRT Enable
Power Save
0
1
Control
PWRT
LPRC
Device Reset
NMI (Wake-up)
DS61143H-page 137

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