PIC32MX440F512HT-80V/PT Microchip Technology, PIC32MX440F512HT-80V/PT Datasheet - Page 165

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PIC32MX440F512HT-80V/PT

Manufacturer Part Number
PIC32MX440F512HT-80V/PT
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet

Specifications of PIC32MX440F512HT-80V/PT

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-TQFP
Core
MIPS
Processor Series
PIC32MX4xx
Data Bus Width
32 bit
Maximum Clock Frequency
80 MHz
Data Ram Size
32 KB
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Mounting Style
SMD/SMT
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Operating Temperature
+ 105 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX440F512HT-80V/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
FIGURE 29-4:
© 2011 Microchip Technology Inc.
Clock Sources = (FRC, FRCDIV, FRCDIV16, FRCPLL, EC, ECPLL and LPRC)
Internal Voltage Regulator Enabled
Clock Sources = (FRC, FRCDIV, FRCDIV16, FRCPLL, EC, ECPLL and LPRC)
External V
Internal Voltage Regulator Enabled
Clock Sources = (HS, HSPLL, XT, XTPLL and S
Note 1: The Power-up period will be extended if the power-up sequence completes before the device
CORE
2: Includes interval voltage regulator stabilization delay.
3: Power-up Timer (PWRT); only active when the internal voltage regulator is disabled.
Power Up Sequence
Power Up Sequence
(Note 2)
(Note 2)
(Note 3)
Power Up Sequence
exits from BOR (V
Provided
POWER-ON RESET TIMING CHARACTERISTICS
V
V
POR
POR
V
POR
DD
(Note 1)
(Note 1)
< V
(T
SY00
(T
SY00
PU
PU
DDMIN
)
)
(T
(T
(Note 1)
SY01
SYSDLY
SY02
PWRT
).
(T
SY10
OSC
)
OST
)
(T
SYSDLY
)
SY02
)
(T
CPU starts fetching code
SYSDLY
SY02
)
)
CPU starts fetching code
V
PIC32MX3XX/4XX
DD
CPU starts fetching code
V
V
V
DD
DD
CORE
DS61143H-page 165

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