PIC32MX440F512HT-80V/PT Microchip Technology, PIC32MX440F512HT-80V/PT Datasheet - Page 63

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PIC32MX440F512HT-80V/PT

Manufacturer Part Number
PIC32MX440F512HT-80V/PT
Description
512 KB Flash, 32 KB RAM, USB-OTG, 80 MHz, 10-Bit ADC, DMA 64 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet

Specifications of PIC32MX440F512HT-80V/PT

Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, IrDA, LIN, PMP, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
64-TQFP
Core
MIPS
Processor Series
PIC32MX4xx
Data Bus Width
32 bit
Maximum Clock Frequency
80 MHz
Data Ram Size
32 KB
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Operating Temperature Range
- 40 C to + 105 C
Mounting Style
SMD/SMT
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Operating Temperature
+ 105 C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC32MX440F512HT-80V/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE 4-13:
Legend:
Note
9120 ADC1BUFB
9130 ADC1BUFC
9140 ADC1BUFD
9150 ADC1BUFE
9160 ADC1BUFF
9110 ADC1BUFA
1:
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
This register has corresponding CLR, SET and INV registers at its virtual address, plus an offset of 0x4, 0x8 and 0xC, respectively. See
31:16
31:16
31:16
31:16
31:16
31:16
15:0
15:0
15:0
15:0
15:0
15:0
ADC REGISTERS MAP (CONTINUED)
31/15
30/14
29/13
28/12
27/11
26/10
25/9
ADC Result Word B (ADC1BUFB<31:0>)
ADC Result Word C (ADC1BUFC<31:0>)
ADC Result Word D (ADC1BUFD<31:0>)
ADC Result Word E (ADC1BUFE<31:0>)
ADC Result Word A (ADC1BUFA<31:0>)
ADC Result Word F (ADC1BUFF<31:0>)
24/8
Bits
23/7
22/6
Section 12.1.1 “CLR, SET and INV Registers”
21/5
20/4
19/3
18/2
for more information.
17/1
16/0
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000

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