PIC32MX575F512LT-80V/BG Microchip Technology, PIC32MX575F512LT-80V/BG Datasheet - Page 131
![512 KB Flash, 64 KB RAM, USB-OTG, CAN, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x10x1.](/photos/40/62/406286/landingpagemicrochippic32_sml.jpg)
PIC32MX575F512LT-80V/BG
Manufacturer Part Number
PIC32MX575F512LT-80V/BG
Description
512 KB Flash, 64 KB RAM, USB-OTG, CAN, 80 MHz, 10-Bit ADC, DMA 121 XBGA 10x10x1.
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX575F512LT-80V/BG
Processor Series
PIC32MX5xx
Core
MIPS
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
512 KB
Data Ram Size
64 KB
Interface Type
USB, I2C, UART, RS-232, RS-485, SPI
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
5
Number Of Timers
5
Operating Supply Voltage
2.3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
XBGA-100
Operating Temperature Range
- 40 C to + 85 C
Supply Current (max)
10 mA
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
CAN, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
-
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX575F512LT-80V/BG
Manufacturer:
Microchip Technology
Quantity:
10 000
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11.0
The Universal Serial Bus (USB) module contains
analog and digital components to provide a USB 2.0
full-speed and low-speed embedded host, full-speed
device or OTG implementation with a minimum of
external components. This module in Host mode is
intended for use as an embedded host and therefore
does not implement a UHCI or OHCI controller.
The USB module consists of the clock generator, the
USB voltage comparators, the transceiver, the Serial
Interface Engine (SIE), a dedicated USB DMA control-
ler, pull-up and pull-down resistors, and the register
interface. A block diagram of the PIC32 USB OTG
module is presented in
© 2009-2011 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
USB ON-THE-GO (OTG)
of the PIC32MX5XX/6XX/7XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 27. “USB On-
The-Go (OTG)” (DS61126) in the “PIC32
Family Reference Manual” , which is
available from the Microchip web site
(www.microchip.com/PIC32).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
Figure
11-1.
in
The clock generator provides the 48 MHz clock
required for USB full-speed and low-speed communi-
cation. The voltage comparators monitor the voltage on
the V
transceiver provides the analog translation between
the USB bus and the digital logic. The SIE is a state
machine that transfers data to and from the endpoint
buffers and generates the hardware protocol for data
transfers. The USB DMA controller transfers data
between the data buffers in RAM and the SIE. The inte-
grated pull-up and pull-down resistors eliminate the
need for external signaling components. The register
interface
communicate with the module.
The PIC32 USB module includes the following
features:
• USB Full-speed support for host and device
• Low-speed host support
• USB OTG support
• Integrated signaling resistors
• Integrated analog comparators for V
• Integrated USB transceiver
• Transaction handshaking performed by hardware
• Endpoint buffering anywhere in system RAM
• Integrated DMA to access system RAM and Flash
PIC32MX5XX/6XX/7XX
monitoring
Note:
BUS
pin to determine the state of the bus. The
allows
The implementation and use of the USB
specifications, as well as other third party
specifications
require licensing; including, but not limited
to, USB Implementers Forum, Inc. (also
referred to as USB-IF). The user is fully
responsible
satisfying
obligations.
the
any
CPU
for
or
applicable
technologies,
investigating
to
DS61156G-page 131
configure
BUS
licensing
may
and
and
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