PIC32MX675F512L-80V/PT Microchip Technology, PIC32MX675F512L-80V/PT Datasheet - Page 40
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PIC32MX675F512L-80V/PT
Manufacturer Part Number
PIC32MX675F512L-80V/PT
Description
512 KB Flash, 64 KB RAM, USB-OTG, Ethernet, 80 MHz, 10-Bit ADC, DMA 100 TQFP 12x
Manufacturer
Microchip Technology
Series
PIC® 32MXr
Datasheet
1.PIC32MX575F256H-80VPT.pdf
(256 pages)
Specifications of PIC32MX675F512L-80V/PT
Core Processor
MIPS32® M4K™
Core Size
32-Bit
Speed
80MHz
Connectivity
Ethernet, I²C, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
100-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC32MX675F512L-80V/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC32MX5XX/6XX/7XX
TABLE 1-1:
DS61156G-page 40
EMDC
EMDIO
AERXD0
AERXD1
AERXD2
AERXD3
AERXERR
AERXDV
AECRSDV
AERXCLK
AEREFCLK
AETXD0
AETXD1
AETXD2
AETXD3
AETXERR
AETXEN
AETXCLK
AECOL
AECRS
AEMDC
AEMDIO
TRCLK
TRD0
TRD1
TRD2
TRD3
PGED1
PGEC1
PGED2
PGEC2
MCLR
Legend: CMOS = CMOS compatible input or output
Note 1:
Pin Name
2:
ST = Schmitt Trigger input with CMOS levels
TTL = TTL input buffer
Pin numbers are provided for reference only. See the
See
QFN/TQFP
Section 24.0 “Ethernet Controller”
64-Pin
PINOUT I/O DESCRIPTIONS (CONTINUED)
30
49
43
42
55
44
45
59
58
54
30
49
16
15
18
17
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
7
Pin Number
100-Pin
TQFP
71
68
18
19
28
29
12
12
14
14
47
48
44
43
35
67
66
42
41
71
68
91
97
96
95
92
25
24
27
26
13
1
(1)
121-Pin
XBGA
C11
E11
C11
G1
G2
E9
K3
B2
F2
F2
F3
F3
K9
K7
E8
E9
C5
A3
C3
C4
B5
K2
K1
F1
L2
L9
L8
J5
L7
J7
J3
L1
Type
Pin
I/O
I/O
I/O
I/O
I/P
for more information.
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Buffer
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
“Pin
Analog = Analog input
O = Output
Diagrams” section for device pin availability.
Ethernet management data clock
Ethernet management data
Alternate Ethernet Receive Data 0
Alternate Ethernet Receive Data 1
Alternate Ethernet Receive Data 2
Alternate Ethernet Receive Data 3
Alternate Ethernet receive error input
Alternate Ethernet receive data valid
Alternate Ethernet carrier sense data valid
Alternate Ethernet receive clock
Alternate Ethernet reference clock
Alternate Ethernet Transmit Data 0
Alternate Ethernet Transmit Data 1
Alternate Ethernet Transmit Data 2
Alternate Ethernet Transmit Data 3
Alternate Ethernet transmit error
Alternate Ethernet transmit enable
Alternate Ethernet transmit clock
Alternate Ethernet collision detect
Alternate Ethernet carrier sense
Alternate Ethernet Management Data clock
Alternate Ethernet Management Data
Trace clock
Trace Data bits 0-3
Data I/O pin for Programming/Debugging
Communication Channel 1
Clock input pin for Programming/Debugging
Communication Channel 1
Data I/O pin for Programming/Debugging
Communication Channel 2
Clock input pin for Programming/Debugging
Communication Channel 2
Master Clear (Reset) input. This pin is an
active-low Reset to the device.
© 2009-2011 Microchip Technology Inc.
Description
P = Power
I = Input
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
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