STM32W108C8U64TR STMicroelectronics, STM32W108C8U64TR Datasheet - Page 182
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STM32W108C8U64TR
Manufacturer Part Number
STM32W108C8U64TR
Description
16/32-BITS MICROS
Manufacturer
STMicroelectronics
Series
STM32r
Datasheet
1.STM32W108C8U63TR.pdf
(207 pages)
Specifications of STM32W108C8U64TR
Applications
RF4CE, Remote Control
Core Processor
ARM® Cortex-M3™
Program Memory Type
FLASH (64 kB)
Controller Series
STM32W
Ram Size
8K x 8
Interface
I²C, SPI, UART/USART
Number Of I /o
24
Voltage - Supply
1.18 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Debug support
13.1
Note:
182/207
STM32W108 JTAG TAP connection
The STM32W108 MCU integrates two serially-connected JTAG TAPs in the following order;
the TMC TAP dedicated for Test (IR is 4-bit wide) and the Cortex™-M3 TAP (IR is 4-bit
wide).
To access the TAP of the Cortex-M3 for debug purposes:
1.
2.
3.
Important: Once Serial-Wire is selected using the dedicated ARM JTAG sequence, the
TMC TAP is automatically disabled (JTMS forced high).
First, it is necessary to shift the BYPASS instruction of the TMC TAP.
Then, for each IR shift, the scan chain contains 8 bits (= 4 + 4) and the unused TAP
instruction must be shifted in using the BYPASS instruction.
For each data shift, the unused TAP, which is in BYPASS mode, adds 1 extra data bit in
the data scan chain.
Doc ID 018587 Rev 1
STM32W108C8
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