MK40DN512ZVLQ10 Freescale Semiconductor, MK40DN512ZVLQ10 Datasheet - Page 27

• Manufacturer Part Number: MK40DN512ZVLQ10
• Description: KINETIS 512K USB LCD
• Manufacturer: Freescale Semiconductor

Specifications of MK40DN512ZVLQ10

• Processor Series: K40
• Core: ARM Cortex M4
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• Interface Type: USB, CAN, SPI, I2C, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 2
• Number Of Timers: 2
• Operating Supply Voltage: 1.71 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-144
• Operating Temperature Range: - 40 C to + 105 C
• Processor To Be Evaluated: MK40DN512ZVLQ10
• Supply Current (max): 185 mA
• Lead Free Status / Rohs Status: No

4.5.7.8 Secure Digital Host Controller (SDHC)
Freescale Semiconductor, Inc.
• Full-duplex operation
• Standard mark/space non-return-to-zero (NRZ) format
• 13-bit baud rate selection with fractional divide of 32
• Programmable 8-bit or 9-bit data format
• Separately enabled transmitter and receiver
• Programmable transmitter output polarity
• Programmable receive input polarity
• 13-bit break character option
• 11-bit break character detection option
• Parameterizable buffer support for one dataword for each transmit and receive
• Independent FIFO structure for transmit and receive
• Two receiver wakeup methods:
• Address match feature in receiver to reduce address mark wakeup ISR overhead
• Interrupt or DMA driven operation
• Receiver framing error detection
• Hardware parity generation and checking
• 1/16 bit-time noise detection
• Compatible with the following specifications:
• Designed to work with CE-ATA, SD Memory, miniSD Memory, SDIO, miniSDIO, SD Combo, MMC, MMCplus, and
• SD bus clock frequency up to 50 MHz
• Supports 1-/4-bit SD and SDIO modes, 1-/4-/8-bit MMC modes, 1-/4-/8-bit CE-ATA devices
• Up to 200 Mbps data transfer for SD/SDIO cards using four parallel data lines
• Up to 416 Mbps data transfer for MMC using 8 parallel data lines
• Single- and multi-block read and write
• 1-4096 byte block size
• Write-protection switch for write operations
• Synchronous and asynchronous abort
• Pause during the data transfer at a block gap
• SDIO read wait and suspend/resume operations
• Auto CMD12 for multi-block transfer
• Host can initiate non-data transfer commands while the data transfer is in progress
• Allows cards to interrupt the host in 1- and 4-bit SDIO modes
• Supports interrupt period, defined in the SDIO standard
• Fully configurable 128 x 32-bit FIFO for read/write data
• Internal DMA capabilities
• Supports voltage selection by configuring vendor specific register bit
• Supports advanced DMA to perform linked memory access
RS-MMC cards
• Idle line wakeup
• Address mark wakeup
• SD Host Controller Standard Specification, Version 2.0
• MultiMediaCard System Specification, Version 4.2
• SD Memory Card Specification, Version 2.0
• SDIO Card Specification, Version 2.0
• CE-ATA Card Specification, Version 1.0
advanced DMA support
cards
K40 Family Product Brief, Rev. 8, 5/2011
(http://www.sdcard.org
(http://www.sdcard.org
(http://www.sdcard.org
(http://www.mmca.org
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)
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), supporting high capacity SD memory
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) with test event register and
Communication interfaces
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