MK60DN512ZVLQ10 Freescale Semiconductor, MK60DN512ZVLQ10 Datasheet - Page 24

• Manufacturer Part Number: MK60DN512ZVLQ10
• Description: KINETIS 512K ENET
• Manufacturer: Freescale Semiconductor

Specifications of MK60DN512ZVLQ10

• Processor Series: K60
• Core: ARM Cortex M4
• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 512 KB
• Data Ram Size: 128 KB
• Interface Type: USB, CAN, SPI, I2C, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 2
• Number Of Timers: 2
• Operating Supply Voltage: 1.71 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-144
• Operating Temperature Range: - 40 C to + 105 C
• Processor To Be Evaluated: MK60DN512ZVLQ10
• Supply Current (max): 185 mA
• Lead Free Status / Rohs Status: No

Peripheral operating requirements and behaviors
1.
2.
3.
4.
6 Peripheral operating requirements and behaviors
All digital I/O switching characteristics assume:
6.1 Core modules
6.1.1 Debug trace timing specifications
24
—
Board type
1. output pins
2. input pins
Symbol
T
T
T
cyc
wh
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air), or EIA/JEDEC Standard JESD51-6, Integrated Circuit Thermal Test Method
Environmental Conditions—Forced Convection (Moving Air).
Determined according to JEDEC Standard JESD51-8, Integrated Circuit Thermal Test Method Environmental
Conditions—Junction-to-Board.
Determined according to Method 1012.1 of MIL-STD 883, Test Method Standard, Microcircuits, with the cold plate
temperature used for the case temperature. The value includes the thermal resistance of the interface material
between the top of the package and the cold plate.
Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental
Conditions—Natural Convection (Still Air).
wl
• have C
• are configured for fast slew rate (PORTx_PCRn[SRE]=0), and
• are configured for high drive strength (PORTx_PCRn[DSE]=1)
• have their passive filter disabled (PORTx_PCRn[PFE]=0)
Clock period
Low pulse width
High pulse width
Description
Ψ
Symbol
JT
L
=30pF loads,
K60 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Table 12. Debug trace operating behaviors
Thermal
characterization
parameter,
junction to
package top
outside center
(natural
convection)
Description
Table continues on the next page...
2
144 LQFP
Preliminary
2
MAPBGA
144
Frequency dependent
Min.
2
2
°C/W
Unit
Freescale Semiconductor, Inc.
Max.
—
—
4
Notes
MHz
Unit
ns
ns