ESD7004MUTAG ON Semiconductor, ESD7004MUTAG Datasheet - Page 3

• Manufacturer Part Number: ESD7004MUTAG
• Description: TVS Diodes - Transient Voltage Suppressors Low Capacitance ESD Protection Diode
• Manufacturer: ON Semiconductor
• Series: -r

Specifications of ESD7004MUTAG

• Polarity: Unidirectional
• Channels: 4 Channels
• Clamping Voltage: 10 V
• Package / Case: UDFN-10
• Breakdown Voltage: 5.5 V
• Termination Style: SMD/SMT
• Capacitance: 0.4 pF
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 55 C
• Dimensions: 1 mm W x 2.5 mm L x 0.55 mm H
• Mounting Style: SMD/SMT
• Voltage - Reverse Standoff (typ): 5V
• Voltage - Breakdown: 5.5V
• Power (watts): -
• Polarization: 4 Channel Array - Unidirectional
• Mounting Type: Surface Mount
• Rohs Compliant: YES
• Diode Type: Low Capacitance / ESD Protection
• Clamping Voltage Vc Max: 15.6V
• Diode Case Style: UDFN
• No. Of Pins: 10
• Svhc: No SVHC (20-Jun-2011)
• Lead Free Status / Rohs Status: Details

The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
IEC 61000−4−2 Spec.
Level
For sensitive circuit elements it is important to limit the
1
2
3
4
ESD Gun
Voltage
Test
(kV)
2
4
6
8
First Peak
Current
22.5
(A)
7.5
15
30
Figure 4. Diagram of ESD Clamping Voltage Test Setup
Current at
TVS
30 ns (A)
100
90
80
70
60
50
40
30
20
10
0
12
16
4
8
0
t
Cable
50 W
r
t
Figure 5. 8 X 20 ms Pulse Waveform
P
Figure 3. IEC61000−4−2 Spec
Current at
60 ns (A)
PEAK VALUE I
20
2
4
6
8
http://onsemi.com
Oscilloscope
HALF VALUE I
50 W
t, TIME (ms)
3
RSM
PULSE WIDTH (t
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
40
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
@ 8 ms
100%
I
peak
90%
10%
I @ 30 ns
I @ 60 ns
RSM
/2 @ 20 ms
IEC61000−4−2 Waveform
P
) IS DEFINED
60
t
P
= 0.7 ns to 1 ns
80