DC1506A Linear Technology, DC1506A Datasheet - Page 8

• Manufacturer Part Number: DC1506A
• Description: LTC4361-1/LTC4361-2 Overvoltage/Overcurrent Protection Controller With Latchoff/Auto-Retry
• Manufacturer: Linear Technology
• Series: -r

Specifications of DC1506A

• Design Resources: DC1506 Design Files DC1506A Schematic
• Main Purpose: Overvoltage/Overcurrent Protection
• Embedded: No
• Utilized Ic / Part: LTC4361
• Primary Attributes: -
• Secondary Attributes: -
• Kit Application Type: Power Management
• Application Sub Type: Overvoltage Protection
• Features: Demonstrates Three Protection Schemes Selected At JP1, Provides Connection For USB Protection
• Lead Free Status / Rohs Status: Not applicable / Not applicable

APPLICATIONS INFORMATION
LTC4361-1/LTC4361-2
The LTC4361-1 has an internal latch that maintains this
off state until it is reset. To reset this latch, cycle IN be-
low 2.1V (V
than 500μs. After reset, the LTC4361-1 goes through the
start-up cycle.
In applications not requiring the overcurrent protection, tie
the SENSE pin to the IN pin. To implement an overcurrent
threshold I
After choosing the R
8
R
I
I
TRIP(MAX)
TRIP(MIN)
SENSE
TRIP
=
IN(UVL)
=
ΔV
I
=
TRIP
, choose R
R
R
OC
ΔV
ΔV
SENSE(MAX)
SENSE(MIN)
) or ON above 1.5V (V
OC(MAX)
OC(MIN)
SENSE
PWRGD
I CABLE
GATE
OUT
ON
IN
SENSE
, keep in mind that:
V
130ms
IN(UVL)
FROM UVLO
START-UP
using the formula:
65ms
V
V
GATE(TH)
IN(OV)
ON(TH)
OV
V
130ms
V
GATE(TH)
) for more
IN(OV)
Figure 2. PWRGD Behavior
FROM OV
RESTART
– V
65ms
OV
ON
PWRGD Output
PWRGD is an active low output with a MOSFET pull-down
to ground and a 500k resistive pull-up to OUT. The PWRGD
pin pull-down releases during the low current sleep mode
(invoked by ON high), UVLO, overvoltage or overcurrent
and the subsequent 130ms start-up delay. After the start-
up delay, GATE starts its slow ramp-up and control of the
PWRGD pull-down passes on to the GATE high comparator.
V
pull-down and V
The PWRGD pull-down is capable of sinking up to 3mA
of current allowing it to drive an optional LED. To inter-
face PWRGD to another I/O rail, connect a resistor from
PWRGD to the I/O rail with a resistance low enough to
override the internal 500k pull-up to OUT. Figure 2 details
PWRGD behavior for a LTC4361-2 with 1k pull-up to 5V
at PWRGD.
V
GATE(TH)
GATE
130ms
FROM ON
RESTART
> V
GATE(TH)
65ms
THRESHOLD
V
GATE(TH)
10μs (NOT TO SCALE)
OC
GATE
for more than 65ms asserts the PWRGD
OC
130ms
< V
FROM OC
RESTART
GATE(TH)
436112 F02
65ms
V
GATE(TH)
releases the pull-down.
436112fa