DS26522GN+ Maxim Integrated Products, DS26522GN+ Datasheet - Page 35

IC TXRX T1/E1/J1 DUAL 144CSBGA

DS26522GN+

Manufacturer Part Number
DS26522GN+
Description
IC TXRX T1/E1/J1 DUAL 144CSBGA
Manufacturer
Maxim Integrated Products
Type
Transceiverr
Datasheets

Specifications of DS26522GN+

Number Of Drivers/receivers
2/2
Protocol
RS232
Voltage - Supply
3.14 V ~ 3.47 V
Mounting Type
Surface Mount
Package / Case
144-CSBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8.8.1.7 Mapping E1 Channels onto a 1.544MHz Backplane
The user can use the RSCLKM bit (RIOCR.4) to enable the receive elastic store to operate with a 1.544MHz
backplane (24 channels / frame + F-bit). In this mode the user can choose which of the E1 time slots will be
ignored (not transmitted onto RSER) by programming the Receive Blank Channel Select registers
(RBCS1:RBCS4). A logic 1 in the associated bit location causes the elastic store to ignore the incoming E1 data for
that channel. Typically the user will want to program eight channels to be ignored. The default (power-up)
configuration will ignore channels 25 to 32, so that the first 24 E1 channels are mapped into the 24 channels of the
1.544MHz backplane. In this mode the F-bit location at RSER is always set to 1.
For example, if the user wants to ignore E1 time slots 0 (channel 1) and TS16 (channel 17), the
registers would be programmed as follows:
8.8.2 IBO Multiplexer
The DS26522 supports IBO operation by tri-stating the RSER and RSIG pins at the appropriate times for external
bus wiring. This mode of operation is enabled in the
Note that the channel block signals TCHBLK and RCHBLK are output at the rate of the IBO selection.
Table 8-4. Registers Related to the IBO Multiplexer
Note: The addresses shown are for Framer 1. The address for Framer 2 can be calculated by adding 200 hex to the framer address.
Figure 8-11. IBO Example Circuit
Note: This figure shows a typical application using IBO with a DS26522 device.
Global Transceiver Control Register 1 (GTCR1)
Receive Interleave Bus Operation Control
Register (RIBOC)
Transmit Interleave Bus Operation Control
Register (TIBOC)
REGISTER
XCVR 1
XCVR 2
DS26522
TSSYNCIO2
TSSYNCIO1
RSYSCLK1
RSYSCLK2
TSYSCLK1
TSYSCLK2
RSYNC2
RSYNC1
BPCLK1
RSER2
TSER2
RSER1
TSER1
RSIG2
TSIG2
RBCS4
TSIG1
RSIG1
RBCS1
RBCS2
RBCS3
ADDRESSES
RIBOC
35 of 258
FRAMER
0F0h
088h
188h
= FCh
= 01h
= 00h
= 01h
and
TIBOC
The GIBOE bit enables IBO.
This register can be used for control of how
many framers and the corresponding speed
for the IBO links for the receiver.
This register can be used for control of how
many framers and the corresponding speed
for the IBO links for the transmitter.
registers.
DS26522 Dual T1/E1/J1 Transceiver
FUNCTION
RBCS1:RBCS4

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