DS3154+ Maxim Integrated Products, DS3154+ Datasheet - Page 16

• Manufacturer Part Number: DS3154+
• Description: IC LIU DS3/E3/STS1 QUAD 144CSBGA
• Manufacturer: Maxim Integrated Products
• Type: Line Interface Units (LIUs)r

Specifications of DS3154+

• Number Of Drivers/receivers: 4/4
• Protocol: IEEE 1149.1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 144-CSBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Register Name:
Register Description:
Register Address:
Bit
Name
Default
Status Register Description
The status registers have two types of status bits. Real-time status bits—located in the SRn registers—indicate the
state of a signal at the time it was read. Latched status bits—located in the SRLn registers—are set when a signal
changes state (low-to-high, high-to-low, or both, depending on the bit) and cleared when written with a logic 1
value. After clearing, latched status bits remain cleared until the signal changes state again. Interrupt-enable bits—
located in the SRIEn registers—control whether or not the INT pin is driven low when latched register bits are set.
Figure 5-1. Status Register Logic
Bit 7: E3 Mode Enable (E3M)
Bit 6: STS-1 Mode Enable (STS)
Bits 5, 4: Local Loopback, Remote Loopback Select (LLB, RLB)
Bits 3, 2: Transmitter Data Select (TDSA, TDSB). See
Bit 0: Reset (RST). When this bit is high, the digital logic of the LIU is held in reset and all registers for that LIU
(except the RST bit) are forced to their default values. RST is cleared to 0 at power-up and when the RST pin is
activated.
0 = DS3 operation
1 = E3 or STS-1 operation
When E3M = 1,
0 = E3 operation
1 = STS-1 operation
When E3M = 0, STS selects the DS3 AIS pattern
00 = no loopback
01 = remote loopback
10 = analog local loopback
11 = digital local loopback
0 = normal operation
1 = reset LIU
EVENT
WR
WR
E3M
7
0
STS
SET ON EVENT DETECT CLEAR
INT ENABLE
LATCHED STATUS REGISTER
REGISTER
6
0
GCRn
Global Configuration Register
00h, 10h, 20h, 30h
DS3151/DS3152/DS3153/DS3154 Single/Dual/Triple/Quad DS3/E3/STS-1 LIUs
ON WRITE LOGIC 1
LLB
5
0
16 of 61
RLB
4
0
Table 4-F
(Table
OTHER INT
SOURCE
REAL-TIME STATUS
4-F).
for details.
TDSA
3
0
LATCHED STATUS
TDSB
0
2
—
—
1
SR
SRL
INT
RST
0
0