EL1509CS-T13 Intersil, EL1509CS-T13 Datasheet - Page 7

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EL1509CS-T13

Manufacturer Part Number
EL1509CS-T13
Description
IC LINE DRIVER CPE ADSL 8-SOIC
Manufacturer
Intersil
Type
Driverr
Datasheet

Specifications of EL1509CS-T13

Number Of Drivers/receivers
1/0
Voltage - Supply
5 V ~ 12 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Protocol
-

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Typical Performance Curves
Applications Information
Product Description
The EL1509 is a dual operational amplifier designed for
customer premise line driving in DMT ADSL solutions. It is a
dual current mode feedback amplifier with low distortion
while drawing moderately low supply current. It is built using
Elantec's proprietary complimentary bipolar process and is
offered in industry standard pin-outs. Due to the current
feedback architecture, the EL1509 closed-loop 3dB
bandwidth is dependent on the value of the feedback
resistor. First the desired bandwidth is selected by choosing
the feedback resistor, R
the gain resistor, R
Typical Performance Curves section show the effect of
varying both R
dependent on the power supply voltage.
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT
FIGURE 25. TRANSIMEDANCE vs TEMPERATURE
2.5
1.5
0.5
3.5
2.5
1.5
0.5
3
2
1
0
3
2
1
0
-50
0
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY (4-LAYER) TEST BOARD (DFN EXPOSED
DIEPAD SOLDERED TO PCB PER JESD51-5)
2.907W
1.136W
TEMPERATURE
F
-25
and R
25
G
AMBIENT TEMPERATURE (°C)
. The curves at the beginning of the
0
G
TEMPERATURE (°C)
F
. The 3dB bandwidth is somewhat
, and then the gain is set by picking
50
25
7
50
75 85
75
100
100
125
125
150
150
EL1509
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended. Lead lengths
should be as short as possible, below ¼”. The power supply
pins must be well bypassed to reduce the risk of oscillation.
A 1.0µF tantalum capacitor in parallel with a 0.01µF ceramic
capacitor is adequate for each supply pin.
For good AC performance, parasitic capacitances should be
kept to a minimum, especially at the inverting input. This
implies keeping the ground plane away from this pin. Carbon
resistors are acceptable, while use of wire-wound resistors
should not be used because of their parasitic inductance.
Similarly, capacitors should be low inductance for best
performance.
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
JEDEC JESD51-3 AND SEMI G42-88 (SINGLE
LAYER) TEST BOARD
781mW
TEMPERATURE
25
AMBIENT TEMPERATURE (°C)
50
75 85
100
125
March 26, 2007
150
FN7015.2

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