EL1510CSZ Intersil, EL1510CSZ Datasheet - Page 7

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EL1510CSZ

Manufacturer Part Number
EL1510CSZ
Description
IC LINE DRIVER CO/CPE VDSL 8SOIC
Manufacturer
Intersil
Type
Driverr
Datasheet

Specifications of EL1510CSZ

Number Of Drivers/receivers
1/0
Voltage - Supply
4.5 V ~ 13.2 V
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Protocol
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EL1510CSZ-T7
Manufacturer:
INTERSIL
Quantity:
938
Typical Performance Curves
Applications Information
Product Description
The EL1510 is a dual operational amplifier designed for line
driving in DMT ADSL solutions. It is a dual current mode
feedback amplifier with low distortion while drawing
moderately low supply current. It is built using Elantec's
proprietary complimentary bipolar process and is offered in
industry standard pin-outs. Due to the current feedback
architecture, the EL1510 closed-loop 3dB bandwidth is
dependent on the value of the feedback resistor. First the
desired bandwidth is selected by choosing the feedback
resistor, R
resistor, R
Performance Curves section show the effect of varying both
R
the power supply voltage.
F
FIGURE 25. TRANSIMPEDANCE vs TEMPERATURE
FIGURE 27. PACKAGE POWER DISSIPATION vs AMBIENT
and R
3.5
2.5
1.5
0.5
4.5
3.5
2.5
1.5
0.5
3
2
1
0
4
3
2
1
0
G
-50
F
G
0
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - DFN EXPOSED
DIEPAD SOLDERED TO PCB PER JESD51-5
. The 3dB bandwidth is somewhat dependent on
, and then the gain is set by picking the gain
. The curves at the beginning of the Typical
2.907W
TEMPERATURE
-25
25
AMBIENT TEMPERATURE (°C)
0
DIE TEMPERATURE (°C)
50
25
7
75
50
85
75
100
(Continued)
100
125
125
150
150
EL1510
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit
board layout is necessary for optimum performance. Ground
plane construction is highly recommended. Lead lengths
should be as short as possible, below ¼”. The power supply
pins must be well bypassed to reduce the risk of oscillation.
A 1.0µF tantalum capacitor in parallel with a 0.01µF ceramic
capacitor is adequate for each supply pin.
For good AC performance, parasitic capacitances should be
kept to a minimum, especially at the inverting input. This
implies keeping the ground plane away from this pin. Carbon
resistors are acceptable, while use of wire-wound resistors
should not be used because of their parasitic inductance.
Similarly, capacitors should be low inductance for best
performance.
FIGURE 28. PACKAGE POWER DISSIPATION vs AMBIENT
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT
1.8
1.6
1.4
1.2
0.8
0.6
0.4
0.2
1.2
0.8
0.6
0.4
0.2
1
0
1
0
0
0
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
781mW
1.136W
TEMPERATURE
TEMPERATURE
25
25
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
50
50
75
75
85
85
100
100
125
125
March 26, 2007
150
150
FN7122.2

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