SAB-C161PI-L25F CA Infineon Technologies, SAB-C161PI-L25F CA Datasheet - Page 50

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SAB-C161PI-L25F CA

Manufacturer Part Number
SAB-C161PI-L25F CA
Description
Microcontrollers (MCU) 16BIT SNGL CHIP 5V 25MHz ROM less
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAB-C161PI-L25F CA

Data Bus Width
16 bit
Program Memory Type
ROMLess
Data Ram Size
3 KB
Interface Type
ASC, I2C, SSC
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
76
Number Of Timers
5
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
TQFP-100
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 4 Channel
Packages
PG-TQFP-100
Max Clock Frequency
25.0 MHz
Sram (incl. Cache)
3.0 KByte
A / D Input Lines (incl. Fadc)
4
Program Memory
0.0 KByte
Lead Free Status / Rohs Status
 Details
Other names
B161PIL25FCAXT
Data Sheet
Direct Drive
When pins P0.15-13 (P0H.7-5) equal 011
disabled and the CPU clock is directly driven from the internal oscillator with the input
clock signal.
The frequency of
The timings listed below that refer to TCLs therefore must be calculated using the
minimum TCL that is possible under the respective circumstances. This minimum value
can be calculated via the following formula:
For two consecutive TCLs the deviation caused by the duty cycle of
so the duration of 2TCL is always 1/
used only once for timings that require an odd number of TCLs (1,3,...). Timings that
require an even number of TCLs (2,4,...) may use the formula 2TCL = 1/
Note: The address float timings in Multiplexed bus mode (
CPU
OSC
.
(i.e. the duration of an individual TCL) is defined by the duty cycle of the input clock
TCL
duration of TCL (TCL
min
= 1/
OSC
CPU
* DC
directly follows the frequency of
min
max
= 1/
OSC
(DC = duty cycle)
OSC
. The minimum value TCL
* DC
B
48
during reset the on-chip phase locked loop is
max
) instead of TCL
OSC
11
so the high and low time of
and
min
min
.
45
OSC
) use the maximum
therefore has to be
is compensated
OSC
.
&3,
1999-07

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