ST92T141K4M6 STMicroelectronics, ST92T141K4M6 Datasheet - Page 74

• Manufacturer Part Number: ST92T141K4M6
• Description: Microcontrollers (MCU) OTP EPROM 16K SPI
• Manufacturer: STMicroelectronics

Specifications of ST92T141K4M6

• Data Bus Width: 8 bit, 16 bit
• Program Memory Type: EPROM
• Program Memory Size: 16 KB
• Data Ram Size: 512 B
• Interface Type: SPI
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 15
• Number Of Timers: 2
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-34
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 6 Channel
• Lead Free Status / Rohs Status: No

ST92141 - RESET AND CLOCK CONTROL UNIT (RCCU)
5.6 RESET/STOP MANAGER
The Reset/Stop Manager resets the MCU when
one of the three following events occurs:
– A Hardware reset, initiated by a low level on the
– A Software reset, initiated by a HALT instruction
– A Watchdog end of count condition.
The Low Voltage Detector (LVD) (see Section 5.8)
generates a reset when:
– the power supply, when rising, is under the LVD
Figure 37. Oscillator Start-up Sequence and Reset Timing
74/179
(*) with 4 MHz quartz
Reset pin.
(when enabled).
V
LVDR
1
V
V
OSCIN
OSCOUT
RESET
PIN
INTCLK
DD
DD
MIN
MAX
Threshold.
T
START-UP
T
5.1 ms (*)
INTCLK
– the power supply, when falling, is under the LVD
The event which caused the last Reset is flagged
in the CLK_FLAG register, by setting the SOF-
TRES or the WDGRES bits respectively; a hard-
ware initiated reset will leave both these bits reset.
The hardware reset overrides all other conditions
and forces the ST9 to the reset state. During Re-
set, the internal registers are set to their reset val-
ues, where these are defined, and the I/O pins are
set to the Bidirectional Weak Pull-up mode.
Reset is asynchronous: as soon as the reset pin is
driven low, a Reset cycle is initiated.
V
LVDF
Threshold.
VR02085A