DS26303LN-120+A3 Maxim Integrated Products, DS26303LN-120+A3 Datasheet - Page 33

• Manufacturer Part Number: DS26303LN-120+A3
• Description: Buffers & Line Drivers 3.3V E1/T1/J1 Short Haul Octal LIU
• Manufacturer: Maxim Integrated Products

Specifications of DS26303LN-120+A3

• Lead Free Status / Rohs Status: Details

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: Digital Loopback Configuration Channel n (DLBCn). When this bit is set, the LIUn is placed in
digital loopback. The data at TPOSn/TNEGn is encoded and looped back to the decoder and output on
RPOSn/RNEGn. The jitter attenuator can optionally be included in the transmit or receive paths. Note: LIUn is
placed in dual loopback if RLBC:RLBCn is also set.
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 7 to 0: LOS/AIS Criteria Selection Channel n (LASCSn). This bit is used for LOS/AIS selection criteria for
LIUn. In E1 mode if set, these bits use ETS 300 233 mode selections. If reset, these bits use G.775 criteria. In
T1/J1 mode, T1.231 criteria is selected.
LASCS8
DLBC8
7
0
7
0
LASCS7
DLBC7
6
0
6
0
DLBC
Digital Loopback Configuration Register
0Ch
LASCS
LOS/AIS Criteria Selection Register
0Dh
LASCS6
DLBC6
5
0
5
0
LASCS5
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
DLBC5
33 of 101
4
0
4
0
LASCS4
DLBC4
3
0
3
0
LASCS3
DLBC3
2
0
2
0
LASCS2
DLBC2
1
0
1
0
LASCS1
DLBC1
0
0
0
0