M28W640FSU70ZA6 Micron Technology Inc, M28W640FSU70ZA6 Datasheet - Page 63

• Manufacturer Part Number: M28W640FSU70ZA6
• Manufacturer: Micron Technology Inc

Specifications of M28W640FSU70ZA6

• Cell Type: NOR
• Density: 64Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Address Bus: 22b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TBGA
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 16b
• Number Of Words: 4M
• Supply Current: 18mA
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / Rohs Status: Not Compliant

M28WxxxFS, M28WxxxFSU
Table 32.
(P+7)h = 3Ch
(P+8)h = 3Dh
(P+A)h = 3Fh
(P+C)h = 41h
(P+D)h = 42h
(P+5)h = 3Ah
(P+6)h = 3Bh
(P+9)h = 3Eh
(P+B)h = 40h
(P+E)h = 43h
(P+0)h = 35h
(P+1)h = 36h
(P+2)h = 37h
(P+3)h = 38h
(P+4)h = 39h
P = 35h
Offset
Primary algorithm-specific extended query table
(1)
00C0h
0050h
0052h
0049h
0031h Major version number, ASCII
0030h Minor version number, ASCII
0066h Extended Query table contents for Primary Algorithm. Address (P+5)h
0000h
0000h
0000h
0001h
0003h Block Lock Status
0000h
0030h
0001h
Data
Primary Algorithm extended Query table unique ASCII string “PRI”
contains less significant byte.
Supported Functions after Suspend
Read Array, Read Status Register and CFI Query are always supported
during Erase or Program operation
Defines which bits in the Block Status Register section of the Query are
implemented.
Address (P+A)h contains less significant byte
V
performance)
V
Number of Protection register fields in JEDEC ID space.
"00h," indicates that 256 protection bytes are available
DD
PP
bit 0 Chip Erase supported (1 = Yes, 0 = No)
bit 1 Suspend Erase supported (1 = Yes, 0 = No)
bit 2 Suspend Program supported (1 = Yes, 0 = No)
bit 3 Legacy Lock/Unlock supported (1 = Yes, 0 = No)
bit 4 Queued Erase supported (1 = Yes, 0 = No)
bit 5 Instant individual block locking supported (1 = Yes, 0 = No)
bit 6 Protection bits supported (1 = Yes, 0 = No)
bit 7 Page mode read supported (1 = Yes, 0 = No)
bit 8 Synchronous read supported (1 = Yes, 0 = No)
bit 31 to 9 Reserved; undefined bits are ‘0’
bit 0 Program supported after Erase Suspend (1 = Yes, 0 = No)
bit 7 to 1 Reserved; undefined bits are ‘0’
bit 0 Block Lock Status Register Lock/Unlock bit active (1 = Yes, 0 =
No)
bit 15 to 1 Reserved for future use; undefined bits are ‘0’
bit 7 to 4 HEX value in volts
bit 3 to 0 BCD value in 100mV
bit 7 to 4 HEX value in volts
bit 3 to 0 BCD value in 100mV
Supply Optimum Program/Erase voltage
Logic Supply Optimum Program/Erase voltage (highest
Description
Common Flash Interface (CFI)
Value
12V
Yes
Yes
Yes
Yes
Yes
Yes
Yes
63/76
"P"
"R"
No
No
No
No
No
"1"
"0"
3V
01
"I"