TDA8395 NXP Semiconductors, TDA8395 Datasheet - Page 4

• Manufacturer Part Number: TDA8395
• Manufacturer: NXP Semiconductors

Specifications of TDA8395

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Philips Semiconductors
FUNCTIONAL DESCRIPTION
The TDA8395 is a self-calibrating SECAM decoder
designed for use with a baseband delay circuit.
During frame retrace a 4.433619 MHz reference frequency
is used to calibrate the filters and the demodulator. The
reference frequency should be very stable during this
period.
The Cloche filter is a gyrator-capacitor type filter the
resonance frequency of which is controlled during the
calibration period and offset during scan; this ensures the
correct frequency during calibration.
The demodulator is a Phase-Locked Loop (PLL) type
demodulator which uses the frequency reference and the
bandgap reference to force the PLL to the required
demodulation characteristic.
The low frequency de-emphasis is matched to the PLL and
is controlled by the tuning voltage of the PLL.
A digital identification circuit scans the incoming signal for
SECAM (only line-identification is implemented). The
identification circuit needs to communicate with the
TDA8362 to guarantee that the output signal from the
decoder is only available when no PAL signal has been
identified. If a SECAM signal is decoded a request for
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134)
October 1991
V
T
T
stg
amb
P
SECAM decoder
SYMBOL
positive supply voltage
storage temperature range
operating ambient temperature range
PARAMETER
4
colour-on is transmitted to pin 1 (current is sunk). If the
signal request is granted (i.e. pin 1 is HIGH therefore no
PAL) the colour difference outputs ( (B Y) and (R Y))
from the TDA8362 are high impedance and the output
signals from the TDA8395 are switched ON.
If no SECAM signal is decoded during a two-frame period
the demodulator will be initialized before another attempt
is made also during a two-frame period. The CD outputs
will be blanked or high-impedance depending on the logic
level at pin 1.
A two-level sandcastle pulse generates the required
blanking periods and, also, clocks the digital identification
pulse on the falling edge of the burst gate pulse. To enable
the calibration period to be defined the vertical retrace is
discriminated from the horizontal retrace, this is achieved
by measuring the width of the blanking period.
25
25
MIN.
8.8
+150
+70
MAX.
Preliminary specification
TDA8395
V
C
C
UNIT