MCP23S08-E/P Microchip Technology, MCP23S08-E/P Datasheet - Page 13
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MCP23S08-E/P
Manufacturer Part Number
MCP23S08-E/P
Description
IC I/O EXPANDER SPI 8B 18DIP
Manufacturer
Microchip Technology
Specifications of MCP23S08-E/P
Package / Case
18-DIP (0.300", 7.62mm)
Interface
SPI
Number Of I /o
8
Interrupt Output
Yes
Frequency - Clock
10MHz
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Includes
POR
Logic Family
MCP23S08
Propagation Delay Time
50 ns
Operating Supply Voltage
1.8 V to 5.5 V
Power Dissipation
700 mW
Operating Temperature Range
- 40 C to + 125 C
Input Voltage
1.8 V to 5.5 V
Logic Type
I/O Expander
Maximum Clock Frequency
10 MHz
Maximum Operating Frequency
1.7 MHz
Mounting Style
Through Hole
Output Current
25 mA
Output Voltage
1.8 V to 4.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
GPIODM-KPLCD - BOARD DEMO LCD GPIO EXP KEYPAD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
1.6.6
The IOCON register contains several bits for
configuring the device:
• The Sequential Operation (SEQOP) controls the
• The Slew Rate (DISSLW) bit controls the slew
REGISTER 1-6:
© 2005 Microchip Technology Inc.
incrementing function of the address pointer. If
the address pointer is disabled, the address
pointer does not automatically increment after
each byte is clocked during a serial transfer. This
feature is useful when it is desired to continuously
poll (read) or modify (write) a register.
rate function on the SDA pin. If enabled, the SDA
slew rate will be controlled when driving from a
high to a low.
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CONFIGURATION (IOCON)
REGISTER
IOCON – I/O EXPANDER CONFIGURATION REGISTER (ADDR 0x05)
Unimplemented: Read as ‘0’.
SEQOP: Sequential Operation mode bit.
1 = Sequential operation disabled, address pointer does not increment.
0 = Sequential operation enabled, address pointer increments.
DISSLW: Slew Rate control bit for SDA output.
1 = Slew rate disabled.
0 = Slew rate enabled.
HAEN: Hardware Address Enable bit (MCP23S08 only).
Address pins are always enabled on MCP23008.
1 = Enables the MCP23S08 address pins.
0 = Disables the MCP23S08 address pins.
ODR: This bit configures the INT pin as an open-drain output.
1 = Open-drain output (overrides the INTPOL bit).
0 = Active driver output (INTPOL bit sets the polarity).
INTPOL: This bit sets the polarity of the INT output pin.
1 = Active-high.
0 = Active-low.
Unimplemented: Read as ‘0’.
Legend:
R = Readable bit
- n = Value at POR
bit 7
U-0
—
U-0
—
SEQOP
R/W-0
W = Writable bit
‘1’ = Bit is set
DISSLW
MCP23008/MCP23S08
R/W-0
• The Hardware Address Enable (HAEN) control bit
• The Open-Drain (ODR) control bit
• The Interrupt Polarity (INTPOL) control bit sets
enables/disables the hardware address pins (A2,
A1) on the MCP23S08. This bit is not used on the
MCP23008. The address pins are always enabled
on the MCP23008.
enables/disables the INT pin for open-drain
configuration.
the polarity of the INT pin. This bit is functional
only when the ODR bit is cleared, configuring the
INT pin as active push-pull.
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
HAEN
R/W-0
ODR
x = Bit is unknown
INTPOL
R/W-0
DS21919B-page 13
U-0
—
bit 0