MCP23S17-E/SO Microchip Technology, MCP23S17-E/SO Datasheet - Page 17

• Manufacturer Part Number: MCP23S17-E/SO
• Description: IC I/O EXPANDER SPI 16B 28SOIC
• Manufacturer: Microchip Technology

Specifications of MCP23S17-E/SO

• Package / Case: 28-SOIC (7.5mm Width)
• Interface: SPI
• Number Of I /o: 16
• Interrupt Output: Yes
• Frequency - Clock: 10MHz
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Logic Family: MCP23S17
• Propagation Delay Time: 50 ns
• Operating Supply Voltage: 1.8 V to 5.5 V
• Power Dissipation: 700 mW
• Operating Temperature Range: - 40 C to + 125 C
• Input Voltage: 1.8 V to 5.5 V
• Logic Type: I/O Expander
• Maximum Clock Frequency: 10 MHz
• Maximum Operating Frequency: 1.7 MHz
• Mounting Style: SMD/SMT
• Output Current: 25 mA
• Output Voltage: 1.8 V to 4.5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MCP23X17EV - BOARD EVAL FOR MCP23X17GPIODM-KPLCD - BOARD DEMO LCD GPIO EXP KEYPAD
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1.6.6
The IOCON register contains several bits for
configuring the device:
The BANK bit changes how the registers are mapped
(see
• If BANK = 1, the registers associated with each
• If BANK = 0, the A/B registers are paired. For
It is important to take care when changing the BANK bit
as the address mapping changes after the byte is
clocked into the device. The address pointer may point
to an invalid location after the bit is modified.
For
automatically increment its internal Address Pointer,
the following scenario would occur:
• BANK = 0
• Write 80h to address 0Ah (IOCON) to set the
• Once the write completes, the internal address
For this reason, it is advised to only perform byte writes
to this register when changing the BANK bit.
© 2007 Microchip Technology Inc.
port are segregated. Registers associated with
PORTA are mapped from address 00h - 0Ah and
registers associated with PORTB are mapped
from 10h - 1Ah.
example, IODIRA is mapped to address 00h and
IODIRB is mapped to the next address (address
01h). The mapping for all registers is from 00h -
15h.
BANK bit
now points to 0Bh which is an invalid address
when the BANK bit is set.
Table 1-5
example,
CONFIGURATION REGISTER
and
if
Table 1-6
the
device
for more details).
is
configured
to
MCP23017/MCP23S17
The MIRROR bit controls how the INTA and INTB pins
function with respect to each other.
• When MIRROR = 1, the INTn pins are functionally
• When MIRROR = 0, the INT pins are separated.
The Sequential Operation (SEQOP) controls the
incrementing function of the Address Pointer. If the
address pointer is disabled, the Address Pointer does
not automatically increment after each byte is clocked
during a serial transfer. This feature is useful when it is
desired to continuously poll (read) or modify (write) a
register.
The Slew Rate (DISSLW) bit controls the slew rate
function on the SDA pin. If enabled, the SDA slew rate
will be controlled when driving from a high to low.
The Hardware Address Enable (HAEN) bit enables/
disables hardware addressing on the MCP23S17 only.
The address pins (A2, A1 and A0) must be externally
biased, regardless of the HAEN bit value.
If enabled (HAEN = 1), the device’s hardware address
matches the address pins.
If disabled (HAEN = 0), the device’s hardware address
is A2 = A1 = A0 = 0.
The Open-Drain (ODR) control bit enables/disables the
INT pin for open-drain configuration. Erasing this bit
overrides the INTPOL bit.
The Interrupt Polarity (INTPOL) sets the polarity of the
INT pin. This bit is functional only when the ODR bit is
cleared, configuring the INT pin as active push-pull.
OR’ed so that an interrupt on either port will cause
both pins to activate.
Interrupt conditions on a port will cause its
respective INT pin to activate.
DS21952B-page 17