PCA9535CPW,118 NXP Semiconductors, PCA9535CPW,118 Datasheet - Page 19

• Manufacturer Part Number: PCA9535CPW,118
• Description: IC I/O EXPANDER I2C 16B 24TSSOP
• Manufacturer: NXP Semiconductors

Specifications of PCA9535CPW,118

• Package / Case: 24-TSSOP
• Interface: I²C, SMBus
• Number Of I /o: 16
• Interrupt Output: Yes
• Frequency - Clock: 400kHz
• Voltage - Supply: 2.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: POR
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935285273118; PCA9535CPW-T; PCA9535CPW-T

NXP Semiconductors
[2]
[3]
11. Dynamic characteristics
Table 15.
[1]
[2]
[3]
[4]
PCA9535_PCA9535C_5
Product data sheet
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
Port timing
t
t
t
Interrupt timing
t
t
SCL
BUF
HD;STA
SU;STA
SU;STO
VD;ACK
HD;DAT
VD;DAT
SU;DAT
LOW
HIGH
f
r
SP
v(Q)
su(D)
h(D)
v(INT_N)
rst(INT_N)
Each I/O must be externally limited to a maximum of 25 mA and each octal (IO0_0 to IO0_7 and IO1_0 to IO1_7) must be limited to a
maximum current of 100 mA for a device total of 200 mA.
The total current sourced by all I/Os must be limited to 160 mA. PCA9535C does not source current and does not have the V
specification.
t
t
C
t
from 0.7V
VD;ACK
VD;DAT
v(Q)
b
= total capacitance of one bus line in pF.
measured from 0.7V
= minimum time for SDA data out to be valid following SCL LOW.
= time for acknowledgement signal from SCL LOW to SDA (out) LOW.
Parameter
SCL clock frequency
bus free time between a STOP and
START condition
hold time (repeated) START condition
set-up time for a repeated START
condition
set-up time for STOP condition
data valid acknowledge time
data hold time
data valid time
data set-up time
LOW period of the SCL clock
HIGH period of the SCL clock
fall time of both SDA and SCL signals
rise time of both SDA and SCL signals
pulse width of spikes that must be
suppressed by the input filter
data output valid time
data input set-up time
data input hold time
valid time on pin INT
reset time on pin INT
Dynamic characteristics
DD
on SCL to 30 % I/O output.
DD
on SCL to 50 % I/O output (PCA9535). For PCA9535C, use load circuit shown in
Rev. 05 — 15 September 2008
Conditions
16-bit I
2
C-bus and SMBus, low power I/O port with interrupt
[1]
[2]
[4]
Standard-mode
PCA9535; PCA9535C
Min
300
250
150
4.7
4.0
4.7
4.0
0.3
4.7
4.0
0
0
1
-
-
-
-
-
-
I
2
C-bus
1000
Max
3.45
100
300
200
50
4
4
-
-
-
-
-
-
-
-
-
-
-
20 + 0.1C
20 + 0.1C
Fast-mode I
Min
100
150
1.3
0.6
0.6
0.6
0.1
1.3
0.6
50
0
0
1
-
-
-
-
Figure 24
b
b
[3]
[3]
© NXP B.V. 2008. All rights reserved.
2
C-bus
Max
400
300
300
200
0.9
50
and measure
4
4
-
-
-
-
-
-
-
-
-
-
-
OH
19 of 31
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s
s