PCA9675PW/S911,118 NXP Semiconductors, PCA9675PW/S911,118 Datasheet - Page 19
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
PCA9675PW/S911,118
Manufacturer Part Number
PCA9675PW/S911,118
Description
IC I/O EXPANDER I2C 16B 24TSSOP
Manufacturer
NXP Semiconductors
Datasheet
1.PCA9675BS118.pdf
(34 pages)
Specifications of PCA9675PW/S911,118
Interface
I²C
Number Of I /o
16
Interrupt Output
Yes
Frequency - Clock
1MHz
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-TSSOP
Includes
POR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935285489118
PCA9675PW/S911-T
PCA9675PW/S911-T
PCA9675PW/S911-T
PCA9675PW/S911-T
NXP Semiconductors
10. Application design-in information
PCA9675_1
Product data sheet
10.1 Bidirectional I/O expander applications
10.2 High current-drive load applications
In the 8-bit I/O expander application shown in
to P07 are outputs. When used in this configuration, during a write, the input (P00 and
P01) must be written as HIGH so the external devices fully control the input ports. The
desired HIGH or LOW logic levels may be written to the I/Os used as outputs (P02 to
P07). During a read, the logic levels of the external devices driving the input ports (P00
and P01) and the previous written logic level to the output ports (P02 to P07) will be read.
The GPIO also has an interrupt line (INT) that can be connected to the interrupt logic of
the microprocessor. By sending an interrupt signal on this line, the remote I/O informs the
microprocessor that there is incoming data or a change of data on its ports without having
to communicate via the I
The GPIO has a maximum sinking current of 25 mA per bit. In applications requiring
additional drive, two port pins in the same octal may be connected together to sink up to
50 mA current. Both bits must then always be turned on or off together. Up to 8 pins (one
octal) can be connected together to drive 200 mA.
Fig 24. Bidirectional I/O expander application
Fig 25. High current-drive load application
PROCESSOR
CORE
PROCESSOR
Rev. 01 — 1 February 2007
CORE
2
C-bus.
V
DD
Remote 16-bit I/O expander for Fm+ I
V
DD
SDA
SCL
INT
AD0
AD1
AD2
V
SDA
SCL
INT
AD0
AD1
AD2
DD
Figure
P00
P01
P02
P03
P04
P05
P06
P07
V
DD
P00
P01
P02
P03
P04
P05
P06
P07
24, P00 and P01 are inputs, and P02
temperature sensor
battery status
control for latch
control for switch
control for audio
control for camera
control for MP3
002aab813
LOAD
V
2
DD
002aab812
C-bus with interrupt
PCA9675
V
© NXP B.V. 2007. All rights reserved.
DD
19 of 34