Z0220112VEGR4078 Zilog, Z0220112VEGR4078 Datasheet - Page 30

• Manufacturer Part Number: Z0220112VEGR4078
• Description: IC MODEM 2400BPS DSP AFE 44-PLCC
• Manufacturer: Zilog

Specifications of Z0220112VEGR4078

• Data Format: V.21, V.22, V.23, Bell 103, Bell 212A
• Baud Rates: 2.4k
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 16. REG4: RAM Control Register (Continued)
PS000904-0107
SYMBOL
RAMlE
RXlE
TXlE
Note: All the bits in this register (REG 4) default to logic 0 at power-up or after reset sequences are completed.
POSITION
REG 4, bit 5
REG 4, bit 6
REG 4, bit 7
NAME AND DESCRIPTION
RAM Interrupt Enable Bit. Setting this bit allows the data pump to interrupt
the host when a RAM read/write request has been completed.
Receive Data Interrupt Enable Bit, Parallel Data Mode Only. This bit, when
set, causes the data pump to generate an interrupt whenever the RXI bit is
set.
Transmit Data Interrupt Enable Bit, Parallel Data Mode Only. This bit,
when set, causes the data pump to generate an interrupt whenever the TXI
bit is set.
V.22BIS Data Pump with Integrated AFE
26