STMPE24M31QTR STMicroelectronics, STMPE24M31QTR Datasheet - Page 23

IC SENSOR S-TOUCH 24CH 40QFN

STMPE24M31QTR

Manufacturer Part Number
STMPE24M31QTR
Description
IC SENSOR S-TOUCH 24CH 40QFN
Manufacturer
STMicroelectronics
Series
S-Touch™r
Type
Capacitiver
Datasheets

Specifications of STMPE24M31QTR

Number Of Inputs/keys
24 Key
Data Interface
I²C
Data Rate/sampling Rate (sps, Bps)
100k, 400k
Voltage Reference
External
Voltage - Supply
1.65 V ~ 1.95 V
Current - Supply
900µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
40-VQFN
Output Type
Logic
Interface
I²C
Input Type
Logic
Supply Voltage
1.8 V
Number Of Channels
24
Dimensions
5 mm L x 5 mm W x 0.85 mm H
Temperature Range
- 40 C to + 85 C
Termination Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-10380-2

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
STMPE24M31QTR
Manufacturer:
STM
Quantity:
8 061
Part Number:
STMPE24M31QTR
Manufacturer:
ST
0
STMPE16M31, STMPE24M31
SYSCON-2
Address:
Type:
Reset:
Description:
7
[7:5] SCLK_DIV: Sensor clock divider.
[4:3] PCLK_DIV: PWM clock divider
[2] PMW_CLK: PWM clock disable
[1] GPIO_CLK: GPIO clock disable
[0] CS_CLK: Capacitive sensor clock disable
SCLK_DIV
RW
6
1
000, 001, 010: RESERVED
011: 64
100: 128
101: 256
110: 512
111: 1024
Sensor clock is 2 MHz / ( PRBS_Factor * SCLK_DIV[2:0] )
PRBS factor = 4.5
00 for 16 kHz
01 for 32 kHz
10 for 64 kHz
11 for 128 kHz
Write “1“ to disable the clock to PWM module.
When clock to PWM module is disabled, access to PWM module register will not work correctly.
Write “1” to diWrite “1“ to disable the clock to GPIO module.
When clock to GPIO module is disabled, access to GPIO module register will not work correctly.
Write “1“ to disable the clock to capactive sensor module
When clock to touch module is disabled, access to touch module registers will not work
correclty.
0x04
R/W
0xFE
Sensor and PWM clock divider. The SYSCON-2 register controls the sensor and
PWM clock speed, and the clock gating of various functional modules.
This bit will always read '0'. as the I2C transaction to read this bit will wake up the
device from hibernate mode.
5
Doc ID 16174 Rev 2
4
PCLK_DIV
RW
1
3
Sensor and PWM clock divider
GPIO_CLK
2
RW
1
PWM_CLK
1
System controller
CS_CLK
RW
0
0
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