QT1106-ISG Atmel, QT1106-ISG Datasheet - Page 11

• Manufacturer Part Number: QT1106-ISG
• Description: QT1106 WHEEL/SLIDER CHIP W/7KEYS
• Manufacturer: Atmel
• Series: QSlide™, QTouch™, QWheel™r
• Type: Capacitiver

Specifications of QT1106-ISG

• Touch Panel Interface: 5-Wire
• Number Of Inputs/keys: 7 Slider
• Resolution (bits): 14 b
• Data Interface: Serial, SPI™
• Voltage Reference: External
• Voltage - Supply: 2.8 V ~ 5 V
• Current - Supply: 1.3mA ~ 3.6mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-QFN
• Output Type: Logic
• Interface: SPI
• Input Type: Logic
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 427-1115-2

EK: Key(s) in Error: If EK = 1, there is a sufficient decrease
EW: Wheel/Slider in Error: If EW = 1, there is a sufficient
CK: Key(s) in Calibration: If CK = 1, one or more key(s) are
CW: Wheel/Slider in Calibration: If CW = 1, the
K1...K7: Contains the key states of each key. A ‘1’ in a bit
W: The state of the wheel/rotor. A ‘1’ means the wheel/slider
Position: The position of touch on the wheel/slider. If the
4 Operating Modes
4.1 Introduction
Four basic operating modes are possible: Free Run, LP (Low
Power), Sync and Sleep. Sleep is a special case of LP mode,
where the sleep time is infinite. Sync is a special case of LP
mode which acts as a noise filter over successive /SS pulses
rather than temporarily operating as in Free Run mode.
4.2 Free Run Mode
In this mode the device operates continuously with short
intervals between burst groups; there are three bursts, one
burst for each electrode group. Between burst sets, DRDY
goes high for 450µs to allow SPI communications.
Lq
in capacitance of one or more normal key(s) from the
reference level. All keys will be recalibrated if this
condition is seen for six successive cycles. If QMagic
Proximity mode is active, an error on the Proximity Key
(Key 7) will only cause a recalibration on itself.
decrease in capacitance of the wheel/slider from the
reference level. The wheel/slider will be recalibrated if this
condition is seen for six successive cycles.
being calibrated.
wheel/slider is being calibrated.
position means the key is confirmed as being touched.
is confirmed as being touched.
wheel/slider is not being touched, the position will be the
position of the last touch.
(QT1106 Input - MOSI)
(QT1106 Out - MISO)
Host Data Output
SCLK from Host
QT Data Output
Acquire Bursts
DRDY from QT
/SS from host
>40us
<150us
don't care
don't care
don't care
Figure 4.1 LP Mode SPI Operation with LPB = 1
3-state
No SPI Communication
>125us
<100us
>450us
~23ms
<20us
(grace period)
<240us
11
In this mode, the acquisition bursts are unsynchronized,
making this mode unsuitable if synchronization to mains
frequency is needed.
4.3 LP Mode
LP mode is designed to allow low power operation while still
retaining basic operation but at a slower speed. This mode is
useful for devices that must use the touch keys to wake up a
product, yet be in a low power mode.
Several LP timings allow the user to trade power versus
response time: the slower the response time, the lower the
power consumed.
In LP mode, the device spends most of the time sleeping
between bursts; it wakes itself periodically to do a set of three
acquisition bursts, then goes back to sleep.
If a touch is detected, the device operates as in Free Run
mode and attempts to perform the DI (detect integrator noise
filter) function to completion; if the DI filter fails to confirm a
detection the device goes back to sleep and resumes LP
mode. During the DI function the LPS bit will be cleared.
If a key is found to be in detection the CHANGE pin will go
high and the part will remain in Free Run mode. To go back
into LP mode the host has to request LP mode again.
CHANGE Pin in LP Mode: During the sleep portion of LP
mode, CHANGE is held low.
If however a change of key state is confirmed, CHANGE
goes high and the part runs from then on in Free Run mode
until the host reads the key state and puts the device back
into LP mode or some other mode.
MISO in LP Mode: During the sleep portion of LP mode,
MISO floats.
DRDY during LP Mode: DRDY remains high while the
QT1106 is sleeping, to indicate to the host that SPI
communications are possible. In LP mode, the host should
wake the QT1106 using a pulse on /SS before transferring
data over SPI (see below). During an actual acquire burst,
DRDY is held low.
/SS timing as left
don't care
don't care
SPI Communication
<470us
command bytes
response bytes
~23ms
QT1106_8IR0.07_0907
3-state
don't care
don't care
<240us