QT320-IS Atmel, QT320-IS Datasheet - Page 8

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QT320-IS

Manufacturer Part Number
QT320-IS
Description
SENSOR IC TOUCH PROG 2CH 8-SOIC
Manufacturer
Atmel
Series
QProx™r
Type
Capacitiver
Datasheet

Specifications of QT320-IS

Rohs Status
RoHS non-compliant
Touch Panel Interface
2, 2-Wire
Number Of Inputs/keys
2 Key
Resolution (bits)
16 b
Data Interface
Serial
Voltage Reference
Internal
Voltage - Supply
1.8 V ~ 5.25 V
Current - Supply
600µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SMD (300 mil)
Output Type
*
Interface
*
Input Type
*
Other names
427-1031

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
QT320-ISG
Manufacturer:
ATMEL
Quantity:
310
If SC > 0, then PDC+1 sets the number of burst spacings,
Tbs, that determines the interval of drift compensation, where:
Example:
then
If SC = 0, the result is multplied by 16, and Tbd becomes the
time basis for the compensation rate, where:
Example:
then
NDC operates in exactly the same way as PDC.
2.2.1 P
Range: 0..255; Default: 100; 255 disables
Ability to compensate for drift with increasing signals.
PDC corrects the reference when the signal is drifting up.
Every interval of time the device checks each channel for the
need to move its reference level in the positive direction in
accordance with signal drift. The resulting timing interval for
this adjustment is Tpdc.
This value should not be set too fast, since an approaching
finger could be compensated for partially or entirely before
even touching the sense electrode. Tpdc is common to both
sensing channels and cannot be independently adjusted.
2.2.2 N
Range: 0...255 Default: 2; 255 disables
Aability to compensate for drift with decreasing signals.
This corrects the reference level when the signal is
decreasing due to signal drift. This should normally be faster
than positive drift compensation in order to compensate
quickly for the removal of a touch or obstruction from the
electrode after a MOD
recalibration (Section 1.5.3).
This parameter is common to
both channels. The resulting
timing interval for this
adjustment is Tndc.
lQ
OSITIVE
EGATIVE
Tbs = SC x Ti
PDC = 9,
Tbs = 100ms
Tpdc = (9+1) x 100ms = 1 sec.
Tbd = Tbd1 + Tbd2
PDC = 5,
Tbd = 31ms
Tpdc = (5+1) x 31ms x 16 = 2.98 sec
D
D
RIFT
RIFT
C
C
OMPENSATION
OMPENSATION
(Section 1.5.1)
(user setting)
(Section 1.5.2)
(user setting)
(PDC)
(NDC)
Figure 2-2 Detect Integrator Filter Operation
8
2.3 THRESHOLDS (THR1, THR2)
Range: 1..16; Default: 6
Affects sensitivity.
The detection threshold is set independently for each channel
via the cloning process. Threshold is measured in terms of
counts of signal deviation with respect to the reference level.
Higher threshold counts equate to less sensitivity since the
signal must travel further in order to cross the detection point.
If the signal equals or exceeds the threshold value, a
detection can occur. The detection will end only when the
signal become less than the hysteresis level.
2.4 HYSTERESIS (HYS1, HYS2)
Range: 0...16; Default: 2
Affects detection stability.
The hysteresis levels are set independently for each channel
via the cloning process. Hysteresis is measured in terms of
counts of signal deviation below the threshold level. Higher
values equate to more hysteresis. The channel will become
inactive after a detection when the signal level falls below
THRn-HYSn. Hysteresis prevents chattering of the OUT pin
when there is noise present.
If HYS1 or HYS2 are set to a value equal or greater than
THR1 or THR2 respectively, the channel may malfunction.
Hysteresis should be set to between 10% and 40% of the
threshold value for best results.
If THR1 = 10 and HYS1 = 2, the hysteresis zone will represent
20% of the threshold level. In this example the ‘hysteresis
zone’ is the region from 8 to 10 counts of signal level. Only
when the signal falls back to 7 will the OUT pin become
inactive.
QT320/R1.03 08/02

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