QT240-ISS Atmel, QT240-ISS Datasheet - Page 3

• Manufacturer Part Number: QT240-ISS
• Description: IC SENSOR 4CHAN QTOUCH 20SSOP
• Manufacturer: Atmel
• Series: QTouch™r
• Type: Capacitiver

Specifications of QT240-ISS

• Touch Panel Interface: 4, 2-Wire
• Number Of Inputs/keys: 4 Key
• Resolution (bits): 9 b
• Voltage Reference: Internal
• Voltage - Supply: 3.9 V ~ 5 V
• Current - Supply: 1.5mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SSOP
• Output Type: *
• Interface: *
• Input Type: *
• For Use With: 427-1113 - BOARD EVAL FOR QT240-IS QTOUCH
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 427-1074

Multiple touch electrodes connected to any SNSnK can be
used, for example to create control surfaces on both sides of
an object.
It is important to limit the amount of stray capacitance on the
SNS terminals, for example by minimizing trace lengths and
widths to allow for higher gain without requiring higher values
of Cs. Under heavy delta-Cx loading of one key, cross
coupling to another key’s trace can cause the other key to
trigger. Therefore, electrode traces from adjacent keys
should not be run close to each other over long runs in order
to minimize cross-coupling if large values of delta-Cx are
expected, for example when an electrode is directly touched.
This is not a problem when the electrodes are working
through a plastic panel with normal touch sensitivity.
1.3 SENSITIVITY
Sensitivity can be altered to suit various applications and
situations on a channel-by-channel basis. The easiest and
most direct way to impact sensitivity is to alter the value of
each Cs; more Cs yields higher sensitivity. Each channel has
its own Cs value and can therefore be independently
adjusted.
lQ
Threshold
SPEED
OPT
Output
S1
VDD
1M
R1
F
OUT1
OUT2
OUT3
OUT4
IGURE
22K
RSNS1
10nF
CS1
RS1
2.2K
Figure 2-1 Drift Compensation
1-2 F
Signal
10nF
CS2
RS2
2.2K
22K
RSNS2
AST
QT240_ISS
Reference
, S
PREAD
-S
22K
PECTRUM
RSNS3
10nF
CS3
2.2K
RS3
22K
RSNS4
Hysteresis
10nF
CS4
2.2K
C
RS4
360K
R5
C1
22nF
IRCUIT
62K
VDD
10 second
timeout shown
1M
180K
R3
R6
OPT2
R4
S3
OPT1
3
added to overly sensitive channels to ground, to reduce their
gains. These should be on the order of a few picofarads.
2 - QT240 SPECIFICS
2.1 SIGNAL PROCESSING
These devices process all signals using 16 bit math, using a
number of algorithms pioneered by Quantum. These
algorithms are specifically designed to provide for high
survivability in the face of adverse environmental changes.
2.1.1 D
Signal drift can occur because of changes in Cx, Cs, and
Vdd over time. If a low grade Cs capacitor is chosen, the
signal can drift greatly with temperature. If keys are subject
to extremes of temperature or humidity, the signal can also
drift. It is crucial that drift be compensated, else false
detections, non-detections, and sensitivity shifts will follow.
Drift compensation (Figure 2-1) is a method that makes the
reference level track the raw signal at a slow rate, only while
no detection is in effect. The rate of reference adjustment
VDD
R2
1M
S2
RIFT
must be performed slowly else legitimate detections
can also be ignored. The IC drift compensates each
channel independently using a slew-rate limited
change to the reference level; the threshold and
hysteresis values are slaved to this reference.
Once an object is sensed, the drift compensation
mechanism ceases since the signal is legitimately
high, and therefore should not cause the reference
level to change.
The signal drift compensation is 'asymmetric'; the
reference level drift-compensates in one direction
faster than it does in the other. Specifically, it
compensates faster for decreasing signals than for
increasing signals. Increasing signals should not be
1.3.1 A
Sensitivity can also be increased by using bigger
electrode areas, reducing panel thickness, or using
a panel material with a higher dielectric constant.
1.3.2 D
In some cases the circuit may be too sensitive.
Gain can be lowered further by a number of
strategies: a) making the electrode smaller, b)
making the electrode into a sparse mesh using a
high space-to-conductor ratio, or c) by decreasing
the Cs capacitors.
1.3.3 K
A number of factors can cause sensitivity
imbalances. Notably, SNS wiring to electrodes can
have differing stray amounts of capacitance to
ground. Increasing load capacitance will cause a
decrease in gain. Key size differences, and
proximity to other metal surfaces can also impact
gain.
The four keys may thus require ‘balancing’ to
achieve similar sensitivity levels. This can be best
accomplished by trimming the values of the four
Cs capacitors to achieve equilibrium. The four Rs
resistors have no effect on sensitivity and should
not be altered. Load capacitances can also be
C
OMPENSATION
LTERNATIVE
ECREASING
EY
B
ALANCE
S
W
ENSITIVITY
AYS TO
QT240 1.07/0804
I
NCREASE
S
ENSITIVITY