AD9804AJSTRL Analog Devices Inc, AD9804AJSTRL Datasheet
AD9804AJSTRL
Specifications of AD9804AJSTRL
Related parts for AD9804AJSTRL
AD9804AJSTRL Summary of contents
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FEATURES 18 MSPS Correlated Double Sampler (CDS 10-Bit Variable Gain Amplifier (VGA) Low Noise Clamp Circuits Preblanking Function 10-Bit 18 MSPS A/D Converter 3-Wire Serial Digital Interface 3 V Single Supply Operation Low Power ...
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AD9804–SPECIFICATIONS ANALOG SPECIFICATIONS Parameter TEMPERATURE RANGE Operating Storage POWER SUPPLY VOLTAGE Analog, Digital, Digital Driver POWER CONSUMPTION MAXIMUM CLOCK RATE CORRELATED DOUBLE SAMPLER (CDS) 1 Allowable CCD Reset Transient 1 Max Input Range before Saturation 1 Max CCD Black Pixel ...
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TIMING SPECIFICATIONS (C Parameter SAMPLE CLOCKS DATACLK, SHP, SHD Clock Period DATACLK Hi/Low Pulsewidth SHP Pulsewidth SHD Pulsewidth CLPDM Pulsewidth 1 CLPOB Pulsewidth SHP Rising Edge to SHD Falling Edge SHP Rising Edge to SHD Rising Edge Internal Clock Delay ...
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AD9804 CONNECT Pin No. Mnemonic Type 1, 2, 18, 24 34, 36, 45 3–12 D0– DRVDD P 14 DRVSS P 15, 41, 42, 44 DVSS P 16 DATACLK DI 17, 40 DVDD ...
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TIMING DIAGRAMS CCD SIGNAL SHP t S1 SHD t INH DATACLK t OD OUTPUT N–10 DATA NOTES: 1. RECOMMENDED PLACEMENT FOR DATACLK RISING EDGE IS BETWEEN THE SHD RISING EDGE AND NEXT SHP FALLING EDGE. ...
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AD9804 PROGRAMMING THE SERIAL INTERFACE Table I. VGA Gain Register Contents (Default Value x096) MSB RNW ADDRESS BITS 0 SDATA ...
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VARIABLE GAIN AMPLIFIER (VGA) OPERATION DETAILS The VGA stage provides a gain range dB, pro grammable with 10-bit resolution through the serial digital interface. The minimum gain needed to match a ...
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AD9804 SERIAL INTERFACE (LSB) D0 (MSB DATA OUTPUTS DRIVER SUPPLY 3V ANALOG SUPPLY 0.1�F 10k� 1.0�F 1.0�F 1.0�F 3 0.1� PIN 1 ...