AD9804AJSTRL Analog Devices Inc, AD9804AJSTRL Datasheet - Page 6

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AD9804AJSTRL

Manufacturer Part Number
AD9804AJSTRL
Description
IC CCD SIGNAL PROC 10BIT 48-LQFP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 10-Bitr
Datasheets

Specifications of AD9804AJSTRL

Rohs Status
RoHS non-compliant
Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Mounting Type
Surface Mount
Package / Case
48-LQFP
Current - Supply
-
Lead Free Status / RoHS Status
Not Compliant
AD9804
PROGRAMMING THE SERIAL INTERFACE
MSB
D9
0
1
1
SDATA
SCK
SL
SDATA
D8
0
1
1
SCK
SL
t
NOTES:
1. RNW = READ, NOT WRITE. SET HIGH FOR READ OPERATION.
2. THE RNW BIT AND THE FOUR ADDRESS BITS MUST BE WRITTEN TO THE AD9804. SDATA IS LATCHED ON SCK RISING EDGES.
3. SERIAL DATA FROM VGA GAIN REGISTER IS VALID STARTING AFTER THE 5TH SCK FALLING EDGE, AND IS UPDATED ON SCK FALLING EDGES.
DS
t
NOTES:
1. SDATA BITS ARE INTERNALLY LATCHED ON THE RISING EDGES OF SCK.
2. RNW = READ, NOT WRITE. SET LOW FOR WRITE OPERATION.
3. INTERNAL VGA GAIN REGISTER UPDATE OCCURS AT SL RISING EDGE.
DS
RNW
1
RNW
t
0
LS
D7
0
1
1
ADDRESS BITS
1
t
LS
t
ADDRESS BITS
DH
1
t
DH
0
0
Table I. VGA Gain Register Contents (Default Value x096)
D6
1
1
1
0
0
0
Figure 4. Serial Readback Operation
0
Figure 3. Serial Write Operation
DATA BITS
D5
0
1
1
D0
DATA BITS
t
DV
D0
D1
D1
D4
1
1
1
D2
D2
–6–
D3
D3
D4
D3
1
1
1
D4
D5
D5
D6
D2
1
1
1
D6
D7
D7
D8
D1
1
1
1
D8
D9
t
LH
D9
t
LH
D10
LSB
D0
1
0
1
D10
Gain (dB)
6.0
39.965
40.0
REV. 0

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