P87C51MC2BA/02-S NXP Semiconductors, P87C51MC2BA/02-S Datasheet - Page 15

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P87C51MC2BA/02-S

Manufacturer Part Number
P87C51MC2BA/02-S
Description
MCU 8-Bit 87C 80C51 CISC 96KB EPROM 3.3V/5V 44-Pin PLCC Tray
Manufacturer
NXP Semiconductors
Datasheet

Specifications of P87C51MC2BA/02-S

Package
44PLCC
Device Core
80C51
Family Name
87C
Maximum Speed
24 MHz
Ram Size
3 KB
Program Memory Size
96 KB
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
34
Interface Type
SPI/UART
Operating Temperature
0 to 70 °C
Number Of Timers
3
Philips Semiconductors
9. Limiting values
Table 6:
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
9397 750 12302
Product data
Symbol
T
T
V
I
P
I
, I
amb
stg
I
O
The following applies to the Limiting values:
a) Stresses above those listed under Limiting values may cause permanent damage to the device. This is a stress rating only and
b) This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive
c) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V
functional operation of the device at these or any conditions other than those described in
Section 11 “Dynamic characteristics”
static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.
otherwise noted.
Limiting values
Parameter
operating temperature
storage temperature range
input voltage on EA/V
input voltage on any other pin to V
maximum I
power dissipation
8.3 Security bits
OL
per I/O pin
The P87C51Mx2 has security bits to protect users’ firmware codes. With none of the
security bits programmed, the code in the program memory can be verified. When
only security bit 1 (see
external program memory are disabled from fetching code bytes from the internal
memory. EA is latched on Reset and all further programming of EPROM is disabled.
When security bits 1 and 2 are programmed, in addition to the above, verify mode is
disabled. When all three security bits are programmed, all of the conditions above
apply and all external program memory execution is disabled.
Table 5:
[1]
[2]
Security Bits
1
2
3
4
P - programmed. U - unprogrammed.
Any other combination of security bits is not defined.
PP
pin to V
Bit 1
U
P
P
P
of this specification is not implied.
EPROM security bits
[1][2]
SS
SS
Rev. 03 — 13 November 2003
Bit 2
U
U
P
P
Conditions
under bias
based on package heat
transfer, not device power
consumption
Table
Bit 3
U
U
U
P
5) is programmed, MOVC instructions executed from
P87C51MB2/P87C51MC2
Protection description
No program security features enabled. EEPROM is
programmable and verifiable.
MOVC instructions executed from external program
memory are disabled from fetching code bytes from
internal memory, EA is sampled and latched on Reset,
and further programming of the EPROM is disabled.
Same as 2, also verification is disabled.
Same as 3, external execution is disabled.
80C51 8-bit microcontroller family
Min
0
-
-
65
0.5
Section 10 “Static characteristics”
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Max
+70
+150
+13
V
20
1.5
DD
+ 0.5 V V
SS
Unit
V
mA
W
C
C
unless
15 of 36
and

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