DS92LV1224TMSA/NOPB National Semiconductor, DS92LV1224TMSA/NOPB Datasheet - Page 12

IC DESERIALIZER 10-BIT 28-SSOP

DS92LV1224TMSA/NOPB

Manufacturer Part Number
DS92LV1224TMSA/NOPB
Description
IC DESERIALIZER 10-BIT 28-SSOP
Manufacturer
National Semiconductor
Datasheet

Specifications of DS92LV1224TMSA/NOPB

Function
Deserializer
Data Rate
660Mbps
Input Type
LVDS
Output Type
LVTTL
Number Of Inputs
1
Number Of Outputs
10
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
*DS92LV1224TMSA
*DS92LV1224TMSA/NOPB
DS92LV1224TMSA
www.national.com
DIN
TCLK_R/F
DO+
DO−
DEN
PWRDN
TCLK
SYNC
DVCC
DGND
AVCC
AGND
Pin Diagrams
Serializer Pin Description
Pin Name
I/O
O
O
I
I
I
I
I
I
I
I
I
I
18, 25, 20, 23
27, 28
15, 16
17, 26
3–12
1, 2
No.
13
22
21
19
24
14
DS92LV1023TMSA - Serializer
Data Input. LVTTL levels inputs. Data on these pins are loaded into
a 10-bit input register.
Transmit Clock Rising/Falling strobe select. LVTTL level input.
Selects TCLK active edge for strobing of DIN data. High selects
rising edge. Low selects falling edge.
+ Serial Data Output. Non-inverting Bus LVDS differential output.
− Serial Data Output. Inverting Bus LVDS differential output.
Serial Data Output Enable. LVTTL level input. A low, puts the Bus
LVDS outputs in TRI-STATE.
Powerdown. LVTTL level input. PWRDN driven low shuts down the
PLL and TRI-STATEs outputs putting the device into a low power
sleep mode.
Transmit Clock. LVTTL level input. Input for 40 MHz–66 MHz
(nominal) system clock.
Assertion of SYNC (high) for at least 1024 synchronization symbols
to be transmitted on the Bus LVDS serial output. Synchronization
symbols continue to be sent if SYNC continues asserted. TTL level
input. The two SYNC pins are ORed.
Digital Circuit power supply.
Digital Circuit ground.
Analog power supply (PLL and Analog Circuits).
Analog ground (PLL and Analog Circuits).
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10093318
Description

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