PCA9508DP,118 NXP Semiconductors, PCA9508DP,118 Datasheet - Page 7

• Manufacturer Part Number: PCA9508DP,118
• Description: IC I2C/SMBUS BIDIR-REPEAT 8TSSOP
• Manufacturer: NXP Semiconductors
• Type: Repeaterr

Specifications of PCA9508DP,118

• Package / Case: 8-TSSOP
• Tx/rx Type: I²C Logic
• Delay Time: 170ns
• Capacitance - Input: 5.2pF
• Voltage - Supply: 2.7 V ~ 5.5 V
• Current - Supply: 170mA
• Mounting Type: Surface Mount
• Logic Family: PCA9508
• Operating Supply Voltage: 0.9 V to 5.5 V
• Power Dissipation: 100 mW
• Operating Temperature Range: - 40 C to + 85 C
• Input Voltage: 7 V
• Logic Type: I2C Bus
• Maximum Clock Frequency: 400 KHz
• Mounting Style: SMD/SMT
• Output Voltage: 7 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935285673118; PCA9508DP-T; PCA9508DP-T

NXP Semiconductors
PCA9508_1
Product data sheet
On the B bus side of the PCA9508, the clock and data lines would have a positive offset
from ground equal to the V
be pulled to the V
the end of the acknowledge, the level rises only to the LOW level set by the driver in the
PCA9508 for a short delay while the A bus side rises above 0.5V
HIGH. It is important to note that any arbitration or clock stretching events require that the
LOW level on the B bus side at the input of the PCA9508 (V
recognized by the PCA9508 and then transmitted to the A bus side.
Multiple PCA9508 A sides can be connected in a star configuration
nodes to communicate with each other.
Multiple PCA9508s can be connected in series
connected to the B side. I
segments. The number of devices that can be connected in series is limited by repeater
delay/time-of-flight considerations on the maximum bus speed requirements.
Fig 5.
Typical star application
MASTER
BUS
SDA
SCL
OL
of the slave device, which is very close to ground in this example. At
Rev. 01 — 28 April 2008
10 k
2
C-bus slave devices can be connected to any of the bus
OL
V
CC(A)
of the PCA9508. After the 8
10 k
Hot swappable level translating I
SDAA
SCLA
EN
SDAA
SCLA
EN
SDAA
SCLA
EN
V
V
V
CC(A)
CC(A)
CC(A)
PCA9508
PCA9508
PCA9508
(Figure
V
V
V
CC(B)
CC(B)
CC(B)
SDAB
SDAB
SDAB
SCLB
SCLB
SCLB
6) as long as the A side is
10 k
10 k
10 k
th
clock pulse, the data line will
IL
) be at or below 0.4 V to be
V
CC(B)
10 k
10 k
10 k
CC(A)
(Figure
SDA
SCL
SDA
SCL
SDA
SCL
400 kHz
400 kHz
400 kHz
SLAVE
SLAVE
SLAVE
PCA9508
then it continues
002aac655
© NXP B.V. 2008. All rights reserved.
2
C-bus repeater
5), allowing all
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