PCA9544APW,112 NXP Semiconductors, PCA9544APW,112 Datasheet
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PCA9544APW,112
Specifications of PCA9544APW,112
935275806112
PCA9544APW
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PCA9544APW,112 Summary of contents
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PCA9544A 4-channel I Rev. 04 — 15 June 2009 1. General description The PCA9544A is a 1-of-4 bidirectional translating multiplexer, controlled via the I The SCL/SDA upstream pair fans out to four SCx/SDx downstream pairs, or channels. Only one SCx/SDx ...
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... NXP Semiconductors 3. Ordering information Table 1. Type number PCA9544AD PCA9544APW PCA9544ABS 3.1 Ordering options Table 2. Type number PCA9544AD PCA9544APW PCA9544ABS PCA9544A_4 Product data sheet 4-channel I Ordering information Package Name Description SO20 plastic small outline package; 20 leads; body width 7.5 mm TSSOP20 plastic thin shrink small outline package; 20 leads; ...
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... NXP Semiconductors 4. Block diagram SC0 SC1 SC2 SC3 SD0 SD1 SD2 SD3 SCL SDA INT[3:0] Fig 1. PCA9544A_4 Product data sheet 4-channel I PCA9544A SWITCH CONTROL LOGIC POWER-ON RESET INPUT FILTER INTERRUPT LOGIC Block diagram Rev. 04 — 15 June 2009 PCA9544A 2 C-bus multiplexer with interrupt logic ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning INT0 SD0 SC0 INT1 SD1 SC1 V Fig 2. Fig 4. PCA9544A_4 Product data sheet 4-channel SDA SCL 4 17 INT 5 16 SC3 PCA9544AD 6 15 SD3 7 14 INT3 8 13 SC2 9 12 SD2 10 11 INT2 SS 002aae293 Pin configuration for SO20 ...
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... NXP Semiconductors 5.2 Pin description Table 3. Symbol INT0 SD0 SC0 INT1 SD1 SC1 V SS INT2 SD2 SC2 INT3 SD3 SC3 INT SCL SDA V DD [1] HVQFN20 package supply ground is connected to both V connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level ...
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... NXP Semiconductors 6. Functional description Refer to 6.1 Device addressing Following a START condition the bus master must output the address of the slave it is accessing. The address of the PCA9544A is shown in internal pull-up resistors are incorporated on the hardware selectable address pins and they must be pulled HIGH or LOW. ...
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... NXP Semiconductors Table 4. INT3 6.3 Interrupt handling The PCA9544A provides 4 interrupt inputs, one for each channel and one open-drain interrupt output. When an interrupt is generated by any device, it will be detected by the PCA9544A and the interrupt output will be driven LOW. The channel need not be active for detection of the interrupt ...
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... NXP Semiconductors 6.4 Power-on reset When power is applied reset condition until V and the PCA9544A registers and I states (all zeroes), causing all the channels to be deselected. Thereafter, V lowered below 0 reset the device. 6.5 Voltage translation The pass gate transistors of the PCA9544A are constructed such that the V ...
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... NXP Semiconductors 7. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...
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... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 10. System configuration 7.4 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...
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... NXP Semiconductors 7.5 Bus transactions SDA START condition Fig 12. Write control register SDA START condition Fig 13. Read control register PCA9544A_4 Product data sheet 4-channel I slave address R/W slave address R/W Rev. 04 — 15 June 2009 PCA9544A 2 C-bus multiplexer with interrupt logic control register ...
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... NXP Semiconductors 8. Application design-in information 2 I C-bus/SMBus master (1) If the device generating the interrupt has an open-drain output structure or can be 3-stated, Fig 14. Typical application PCA9544A_4 Product data sheet 4-channel 2 5 SDA SDA SCL SCL INT pull-up resistor is required. If the device generating the interrupt has a totem pole output structure and cannot be 3-stated, a pull-up resistor is not required. The interrupt inputs should not be left fl ...
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... NXP Semiconductors 9. Limiting values Table 6. In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to ground (V Symbol tot T stg T amb [1] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 125 C ...
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... NXP Semiconductors 10. Static characteristics Table 7. Static characteristics +85 C; unless otherwise specified. See SS amb Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage ...
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... NXP Semiconductors Table 8. Static characteristics +85 C; unless otherwise specified. See SS amb Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current ...
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... NXP Semiconductors 11. Dynamic characteristics Table 9. Dynamic characteristics Symbol Parameter t propagation delay PD f SCL clock frequency SCL t bus free time between a STOP and BUF START condition t hold time (repeated) START HD;STA condition t LOW period of the SCL clock LOW t HIGH period of the SCL clock ...
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... NXP Semiconductors SDA t BUF t LOW SCL t HD;STA P S Fig 15. Definition of timing on the I PCA9544A_4 Product data sheet 4-channel HD;DAT HIGH SU;DAT 2 C-bus Rev. 04 — 15 June 2009 PCA9544A 2 C-bus multiplexer with interrupt logic t t HD;STA SU;STA SU;STO Sr 002aaa986 © NXP B.V. 2009. All rights reserved. ...
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... NXP Semiconductors 12. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors HVQFN20: plastic thermal enhanced very thin quad flat package; no leads; 20 terminals; body 0.85 mm terminal 1 index area terminal 1 20 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.23 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 19. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 14. Abbreviations Table 12. Acronym CDM ESD HBM I C-bus LSB MM PCB POR SMBus PCA9544A_4 Product data sheet ...
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... NXP Semiconductors 15. Revision history Table 13. Revision history Document ID Release date PCA9544A_4 20090615 • Modifications: Table 9 “Dynamic – Symbol t – Symbol C PCA9544A_3 20081124 PCA9544A_2 20040929 (9397 750 13931) PCA9544A_1 20040728 (9397 750 13301) PCA9544A_4 Product data sheet 4-channel I Data sheet status Product data sheet characteristics” ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 Functional description . . . . . . . . . . . . . . . . . . . 6 6.1 Device addressing . . . . . . . . . . . . . . . . . . . . . . 6 6.2 Control register . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.2.1 Control register definition . . . . . . . . . . . . . . . . . 6 6.3 Interrupt handling . . . . . . . . . . . . . . . . . . . . . . . 7 6.4 Power-on reset ...