LA-ISPPAC-POWR1014-01TN48E Lattice, LA-ISPPAC-POWR1014-01TN48E Datasheet - Page 4

• Manufacturer Part Number: LA-ISPPAC-POWR1014-01TN48E
• Description: IC, PROG POWER SUPPLY SUPERVISOR TQFP-48
• Manufacturer: Lattice
• Series: ispPAC®r

Specifications of LA-ISPPAC-POWR1014-01TN48E

• Input Voltage: 4.5V
• Supply Voltage Range: 2.8V To 3.96
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +105°C
• No. Of Macrocells: 24
• Termination Type: SMD
• Supply Voltage Min: 2.8V
• Rohs Compliant: Yes
• Applications: General Purpose
• Voltage - Input: -0.3 V ~ 5.9 V
• Voltage - Supply: 2.8 V ~ 3.96 V
• Current - Supply: 20mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Filter Terminals: SMD
• Frequency: 25MHz
• Input Voltage Primary Max: 4.5V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Pin Descriptions (Cont.)
Lattice Semiconductor
Number
1. [IN1...IN4] are inputs to the PLD. The thresholds for these pins are referenced by the voltage on VCCINP. Unused INx inputs should be tied
2. IN1 pin can also be controlled through JTAG interface.
3. [IN2..IN4] can also be controlled through I
4. The VMON inputs can be biased independently from VCCA. Unused VMON inputs should be tied to GNDD.
5. GNDA and GNDD pins must be connected together on the circuit board.
6. VCCD and VCCA pins must be connected together on the circuit board.
7. Open-drain outputs require an external pull-up resistor to a supply.
8. The RESETb pin should only be used for cascading two or more LA-ispPAC-POWR1014/A devices.
9. These pins should be connected to GNDD (LA-ispPAC-POWR1014 device only).
43
21
22
16
18
17
19
39
38
to GNDD.
MCLK
TDO
TCK
TMS
TDI
ATDI
TDISEL
SCL
SDA
Name
9
9
Digital I/O
Digital Output
Digital Input
Digital Input
Digital Input
Digital Input
Digital Input
Digital Input
Digital I/O
Pin Type
2
C/SMBus interface (LA-ispPAC-POWR1014A only).
LA-ispPAC-POWR1014/A Automotive Family Data Sheet
0V to 3.96V
0V to 5.5V
0V to 5.5V
0V to 5.5V
0V to 5.5V
0V to 5.5V
0V to 5.5V
0V to 5.5V
0V to 5.5V
Voltage Range
4
8MHz Clock I/O (Tristate), CMOS Drive - Internal
Pull-up
JTAG Test Data Out
JTAG Test Clock Input
JTAG Test Mode Select - Internal Pull-up
JTAG Test Data In, TDISEL pin = 1 - Internal
Pull-up
JTAG Test Data In (Alternate), TDISEL Pin = 0 -
Internal Pull-up
Select TDI/ATDI Input - Internal Pull-up
I
Only)
I
(LA-ispPAC-POWR1014A Only)
2
2
C Serial Clock Input (LA-ispPAC-POWR1014A
C Serial Data, Bi-directional Pin, Open Drain
Description