SCANSTA101SM/NOPB National Semiconductor, SCANSTA101SM/NOPB Datasheet - Page 2

• Manufacturer Part Number: SCANSTA101SM/NOPB
• Description: IC TEST MASTER LOW-VOLT 49FBGA
• Manufacturer: National Semiconductor

Specifications of SCANSTA101SM/NOPB

• Applications: Testing Equipment
• Interface: IEEE 1149.1
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 49-FBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *SCANSTA101SM; *SCANSTA101SM/NOPB; SCANSTA101SM

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Interface
Parallel Processor Interface
Serial Scan Interface
Test and Debug Interface
System Inputs
Figure 1
Master and its interfaces.
of each of these interfaces.
tion of the device pins and their functions. The device is
composed of three interfaces around a dual-port memory.
These interfaces are the Parallel Processor Interface (PPI),
Connection Diagram
shows a high level view of the SCANSTA101 STA
Table 1
Table 2
provides a brief description
provides a brief descrip-
Description
Used for configuration, ScanMaster scan chain loads and reads, programmable device file
loads and reads, and status monitoring.
Performs parallel to serial conversion, sequences and formats the outgoing serial stream to
conform to 1149.1 protocol.
IEEE 1149.1 TAP
Interface inputs for system control, i.e. clock, reset and output tristate control.
TABLE 1. Interface Descriptions
BGA Package Pinout
(Top View)
2
Serial Scan Interface (SSI), and Test and Debug Interface.
The System Input block designates inputs that have global
use across the device.
The Test and Debug Interface supports BIST, boundary scan,
and internal scan for the SCANSTA101.
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