PI7C9X20505GPBNDE Pericom Semiconductor, PI7C9X20505GPBNDE Datasheet - Page 68

• Manufacturer Part Number: PI7C9X20505GPBNDE
• Description: IC PCIE PACKET SWITCH 256BGA
• Manufacturer: Pericom Semiconductor
• Series: GreenPacket™r

Specifications of PI7C9X20505GPBNDE

• Applications: Data Transport
• Interface: Advanced Configuration Power Interface (ACPI)
• Package / Case: 256-PBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

7.2.98
7.2.99
7.2.100
7.2.101
June 2009 – Revision 1.5
Pericom Semiconductor
PORT ARBITRATION TABLE REGISTER (0) and (1) – OFFSET 180h and
1C0h
The Port arbitration table is a read-write register array that contains a table for Port arbitration. Each
table entry allocates two bits to represent Port Number. The table entry size is dependent on the
number of enabled ports (refer to bit 10 and 11 of Port VC capability register 1). The arbitration table
contains 128 entries if three or four ports are to be enabled. The following table shows the register
array layout for the size of entry equal to two.
Table 7-2 Table Entry Size in 4 Bits
PCI EXPRESS POWER BUDGETING CAPABILITY ID REGISTER –
OFFSET 20Ch
CAPABILITY VERSION – OFFSET 20Ch
NEXT ITEM POINTER REGISTER – OFFSET 20Ch
BIT
15:0
BIT
19:16
BIT
31:20
[111:110]
[127:126]
[15:14]
[31:30]
[47:46]
[63:62]
[79:78]
[95:94]
63 - 56
Phase
Phase
Phase
Phase
Phase
Phase
Phase
Phase
FUNCTION
Extended
Capabilities ID
FUNCTION
Capability Version
FUNCTION
Next Capability
Offset
[109:108]
[125:124]
[13:12]
[29:28]
[45:44]
[61:60]
[77:76]
[93:92]
55 - 48
Phase
Phase
Phase
Phase
Phase
Phase
Phase
Phase
[107:106]
[123:122]
47 - 40
[11:10]
[27:26]
[43:42]
[59:58]
[75:74]
[91:90]
Phase
Phase
Phase
Phase
Phase
Phase
Phase
Phase
TYPE
TYPE
TYPE
RO
RO
RO
[105:104]
[121:120]
[25:24]
[41:40]
[57:56]
[73:72]
[89:88]
39 - 32
Phase
Phase
Phase
Phase
Phase
Phase
Phase
Phase
[9:8]
Page 68 of 81
DESCRIPTION
Read as 0004h to indicate that these are PCI express extended capability
registers for power budgeting.
DESCRIPTION
Read as 1h. Indicates PCIe Base Specification REV. 1.0a.
Reset to 1h.
DESCRIPTION
Read as 000h. No other ECP registers.
Reset to 000h.
[103:102]
[119:118]
[23:22]
[39:38]
[55:54]
[71:70]
[87:86]
31 - 24
Phase
Phase
Phase
Phase
Phase
Phase
Phase
Phase
[7:6]
[101:100]
[117:116]
23 - 16
[21:20]
[37:36]
[53:52]
[69:68]
[85:84]
Phase
Phase
Phase
Phase
Phase
Phase
Phase
Phase
[5:4]
5Port-5Lane PCI Express Switch
[115:114]
[19:18]
[35:34]
[51:50]
[67:66]
[83:82]
[99:98]
15 - 8
Phase
Phase
Phase
Phase
Phase
Phase
Phase
Phase
[3:2]
GreenPacket
[113:112]
[17:16]
[33:32]
[49:48]
[65:64]
[81:80]
[97:96]
Phase
Phase
Phase
Phase
Phase
Phase
Phase
Phase
[1:0]
7 - 0
PI7C9X20505GP
Byte Location
Datasheet
TM
00h
08h
10h
18h
20h
28h
30h
38h
Family