W83697UG Nuvoton Technology Corporation of America, W83697UG Datasheet - Page 31

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W83697UG

Manufacturer Part Number
W83697UG
Description
IC LPC SUPER I/O 128-PQFP
Manufacturer
Nuvoton Technology Corporation of America
Datasheet

Specifications of W83697UG

Applications
PC's, PDA's
Interface
LPC
Voltage - Supply
3.3V, 5V
Package / Case
128-XFQFN
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Supplier Unconfirmed, Lead free / RoHS Compliant

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6.5 Logical Device 0 (FDC)
CR30 (Default 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR60, CR61 (Default 0x03, 0xf0 if PNPCSV = 0 during POR, default 0x00, 0x00 otherwise)
CR70 (Default 0x06 if PNPCSV = 0 during POR, default 0x00 otherwise)
CR74 (Default 0x02 if PNPCSV = 0 during POR, default 0x04 otherwise)
Bit [3:2]: (Pin112)
Bit [1:0]: (Pin114)
Bit [7:1]: Reserved.
Bit 0:
Bit [7:4]: Reserved.
Bit [3:0]: These bits select IRQ resource for FDC.
Bit [7:3]: Reserved.
Bit [2:0]: These bits select DRQ resource for FDC.
These two registers select FDC I/O base address [0x100:0xFF8] on 8 byte boundary.
00
01
10
11
00
01
10
11
1
0
= 0x00 DMA0
= 0x01 DMA1
= 0x02 DMA2
= 0x03 DMA3
= 0x04 - 0x07 No DMA active
SCC8
SOUTD
Reserved
GP72
SCC4
NRID
Reserved
GP70
Activates the logical device.
Logical device is inactive.
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W83697UF/W83697UG
Publication Release Date: May 26, 2005
Revision A1

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