W83697UG Nuvoton Technology Corporation of America, W83697UG Datasheet - Page 39

• Manufacturer Part Number: W83697UG
• Description: IC LPC SUPER I/O 128-PQFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83697UG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Supplier Unconfirmed, Lead free / RoHS Compliant

CR60, CR61 (Default 0x03, 0x30 if PNPCSV = 0 during POR, default 0x00 otherwise)
These two registers select the MIDI Port base address [0x100:0xFFF] on 2byte boundary.
CR62, CR63 (Default 0x00, 0x00 )
These two registers select the GPIO5 base address [0x100:0xFFF] on 4byte boundary.
IO address :
IO address + 1 : CRF3 base address
IO address + 2 : CRF4 base address
IO address + 3 : CRF5 base address
CR70 (Default 0x09 if PNPCSV = 0 during POR, default 0x00 otherwise)
CRF0 (GP5 selection register. Default 0xFF)
When set to a '1', respective GPIO port is programmed as an input port.
When set to a '0', respective GPIO port is programmed as an output port.
CRF1 (GP5 data register. Default 0x00)
If a port is programmed to be an output port, then its respective bit can be read/written.
If a port is programmed to be an input port, then its respective bit can only be read.
CRF2 (GP5 inversion register. Default 0x00)
When set to a '1', the incoming/outgoing port value is inverted.
When set to a '0', the incoming/outgoing port value is the same as in data register.
CRF3 (PLED mode register. Default 0x00)
CRF4 (Default 0x00)
Watch Dog Timer Time-out value. Writing a non-zero value to this register causes the counter to
load the value to Watch Dog Counter and start counting down. Reading this register returns
current value in Watch Dog Counter instead of Watch Dog Timer Time-out value.
Bit [7:4]: Reserved.
Bit [3:0]: These bits select IRQ resource for MIDI Port .
Bit [7:3] : Reserved .
Bit 2:
Bit [1:0]: select PLED mode
select WDTO count mode.
0
1
00
01
10
11
second
minute
Power LED pin is tri-stated.
Power LED pin is droved low.
Power LED pin is a 1Hz toggle pulse with 50 duty cycle.
Power LED pin is a 1/4Hz toggle pulse with 50 duty cycle.
CRF1 base address
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W83697UF/W83697UG
Publication Release Date: May 26, 2005
Revision A1