BD9324EFJ-E2 Rohm Semiconductor, BD9324EFJ-E2 Datasheet - Page 13

• Manufacturer Part Number: BD9324EFJ-E2
• Description: IC CONVERTER REG 4A HTSOP-J8
• Manufacturer: Rohm Semiconductor
• Series: -r
• Type: Step-Down (Buck), PWM - Current Moder

Specifications of BD9324EFJ-E2

• Internal Switch(s): Yes
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 1 V ~ 18 V
• Current - Output: 4A
• Frequency - Switching: 380kHz
• Voltage - Input: 4.75 V ~ 18 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Package / Case: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

z Operation Notes
1) Absolute maximum ratings
2) GND potential
3) Setting of heat
4) Pin short and mistake fitting
5) Actions in strong magnetic field
6) Testing on application boards
7) Ground wiring patterns
8) Regarding input pin of the IC
9) Overcurrent protection circuits
10) Thermal shutdown circuit (TSD)
11) Testing on application boards
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC damage.
Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety
measure such as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be exceeded is
anticipated.
Ensure a minimum GND pin potential in all operating conditions.
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC.
Shorts between output pins or between output pins and the power supply and GND pins caused by the presence of a foreign object may result in
damage to the IC.
Use caution when using the IC in the presence of a strong magnetic field as doing so may cause the IC to malfunction.
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge
capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting
or storing the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process.
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point
at the application's reference point so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in
the small signal ground voltage. Be careful not to change the GND wiring patterns of any external components.
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. P/N junctions are
For example, when the resistors and transistors are connected to the pins as shown in Fig. , a parasitic diode or a transistor operates by inverting
the pin voltage and GND voltage.
The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's architecture.
The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For these reasons, it is
necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements such as by the application of
voltages lower than the GND (P substrate) voltage to input and output pins.
An overcurrent protection circuit designed according to the output current is incorporated for the prevention of IC damage that may result in the
event of load shorting. This protection circuit is effective in preventing damage due to sudden and unexpected accidents. However, the IC should
not be used in applications characterized by the continuous operation or transitioning of the protection circuits. At the time of thermal designing,
keep in mind that the current capacity has negative characteristics to temperatures.
formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements.
This IC incorporates a built-in TSD circuit for the protection from thermal destruction. The IC should be used within the specified power
dissipation range. However, in the event that the IC continues to be operated in excess of its power dissipation limits, the attendant rise in the
chip's junction temperature Tj will trigger the TSD circuit to turn off all output power elements. Operation of the TSD circuit presumes that the
IC's absolute maximum ratings have been exceeded. Application designs should never make use of the TSD circuit.
At the time of inspection of the installation boards, when the capacitor is connected to the pin with low impedance, be sure to discharge
electricity per process because it may load stresses to the IC. Always turn the IC's power supply off before connecting it to or removing it from a
jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure, and use similar caution when
transporting or storing the IC.
Fig. Example of a Simple
Monolithic IC Architecture
(Pin A)
N
P
P+
13/14
N
Resistor
GND
P
Parasitic elements
P+
N
(Pin B)
Parasitic elements
N
P+
C
Transistor (NPN)
N
N
B
P substrate
E
P
GND
P+
N
GND
(Pin B)
(Pin A)
B
GND
C
E
GND
Parasitic
elements
Parasitic
elements