SEH01G72A1BH1MT-30R Swissbit NA Inc, SEH01G72A1BH1MT-30R Datasheet

no-image

SEH01G72A1BH1MT-30R

Manufacturer Part Number
SEH01G72A1BH1MT-30R
Description
DRAM DDR2 VLP 1GB 244-MINI DIMM
Manufacturer
Swissbit NA Inc
Series
-r
Datasheet

Specifications of SEH01G72A1BH1MT-30R

Memory Type
DDR2 SDRAM
Memory Size
1GB
Speed
667MHz
Features
-
Package / Case
244-MDIMM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
1052-1045
1GB DDR2
244 Pin RDIMM
SEH01G72A1BH1MT-30R
1GB PC2-5300 in FBGA Technique
RoHS compliant
Swissbit AG
Industriestrasse 4 – 8
CH – 9552 Bronschhofen
Options:
Environmental Requirements:
Frequency / Latency
DDR2 667 MHz CL5
Standard Grade
Grade W
Operating temperature (T
Operating Humidity
10% to 90% relative humidity, noncondensing
Operating Pressure
105 to 69 kPa (up to 10000 ft.)
Storage Temperature
-55° C to 100°C
Storage Humidity
5% to 95% relative humidity, noncondensing
Storage Pressure
1682 PSI (up to 5000 ft.) at 50° C
Module densities
1024MB with 9 dies and 1 rank
Standard Grade
Grade W
(T
(T
(T
(T
C
)
C
A
C
A
)
)
)
)
– SDRAM Registered Mini-DIMM
-40° C to 95° C
0° C to 85° C
Fon: +41 (0)71 913 03 03
Fax: +41 (0)71 913 03 15
-40° C to 95° C
-40° C to 85° C
0° C to 85° C
0° C to 70° C
Marking
mechanical dimensions
-30
Data Sheet
Features:
244-pin 72-bit Dual-In-Line Double Data Rate
synchronous Registered Mini-DIMM for server
applications
DDR2 - SDRAM component base Micron
MT47H128M8 die rev. H
V
Auto Refresh (CBR) and Self Refresh 8k Refresh
every 64ms
1.8V I/O ( SSTL_18 compatible)
Serial Presence Detect with EEPROM
Four bit prefetch architecture
Very Low Profile (VLP)
Supports ECC error detection and correction
Parity support for control / address bus
DLL to align DQ and DQS transitions with CK
Multiple internal device banks for concurrent operation
Phase-lock loop (PLL) clock driver to reduce loading
Programmable CAS latency (CL)
Posted CAS additive latency (AL)
WRITE latency = READ latency – 1 t
Programmable burst length: 4 or 8
Adjustable data-output drive strength
On-die termination (ODT)
Gold-contact pad
This module family is fully pin and functional
compatible to JEDEC. (see www.jedec.org)
The pcb and all components are manufactured
according to the RoHS compliance specification
[EU Directive 2002/95/EC Restriction of Hazardous
Substances (RoHS)]
DD
= 1.8V ±0.2V, V
www.swissbit.com
eMail: info@swissbit.com
1
DDQ
1.8V ±0.2V
Rev.1.2
1
if no tolerances specified ± 0.15mm
CK
10.06.2010
Page 1
of 14

Related parts for SEH01G72A1BH1MT-30R

SEH01G72A1BH1MT-30R Summary of contents

Page 1

... DDR2 – SDRAM Registered Mini-DIMM 244 Pin RDIMM SEH01G72A1BH1MT-30R 1GB PC2-5300 in FBGA Technique RoHS compliant Options: Frequency / Latency DDR2 667 MHz CL5 Module densities 1024MB with 9 dies and 1 rank Standard Grade ( Grade Environmental Requirements: Operating temperature ( Standard Grade 0° 85° C Grade W -40° ...

Page 2

... The second 128 bytes are available to the end user. Module Configuration DDR2 SDRAMs Organization used 9 x 128M x 8bit 128M x 72bit (1Gbit) Timing Parameters Part Number SEH01G72A1BH1MT-30[W]R Pin Name A0 - A13 BA0, BA1 DQ0 – DQ63 DM0-DM8 RAS# CAS# WE# CKE0 CK0 CK0# DQS0 – ...

Page 3

Reset# P _IN AR E _OUT RR CB0 – CB7 DDQ V REF DDSPD SCL SDA SA0 – SA1 ODT0 NC Pin Configuration PIN Symbol 1 VREF 2 VSS 3 DQ0 4 DQ1 ...

Page 4

Pin Symbol 123 VSS 124 DQ4 125 DQ5 126 VSS 127 DM0 128 NC 129 VSS 130 DQ6 131 DQ7 132 VSS 133 DQ12 134 DQ13 135 VSS 136 DM1 137 NC 138 VSS 139 RFU 140 RFU 141 VSS ...

Page 5

FUNCTIONAL BLOCK DIAGRAMM 1024MB DDR2 ECC Registered miniDIMM, 1 RANK AND 9 COMPONENTS Swissbit AG Industriestrasse 4 – – 9552 Bronschhofen Data Sheet www.swissbit.com Fon: +41 (0)71 913 03 03 Fax: +41 (0)71 913 03 15 eMail: info@swissbit.com ...

Page 6

... When inductance and delay parameters associated with trace lengths are used in simulations, they are significantly more accurate and realistic than a gross estimation of module capacitance. Simulations can then render a considerably more accurate result. JEDEC modules are now designed by using simulations to close timing budgets. ...

Page 7

I Specifications and Conditions DD (0° C ≤ T ≤ + 85° +1.8V ± 0.1V, V CASE DD Parameter & Test Condition OPERATING CURRENT *) : One device bank Active-Precharge ...

Page 8

Parameter & Test Condition OPERATING WRITE CURRENT*) : All device banks open, Continuous burst writes; One module rank active MAX ( RAS ...

Page 9

DDR2 SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (0° C ≤ T ≤ + 85° +1.8V ± 0.1V, V CASE DD AC CHARACTERISTICS PARAMETER SYMBOL Clock cycle time ...

Page 10

DDR2 SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Continued) (0° C ≤ T ≤ + 85° +1.8V ± 0.1V, V CASE DD AC CHARACTERISTICS PARAMETER SYMBOL Address and control input hold t IH time ...

Page 11

DDR2 SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (Continued) (0° C ≤ T ≤ + 85° +1.8V ± 0.1V, V CASE DD AC CHARACTERISTICS PARAMETER SYMBOL ODT power-down exit latency t AXPD ODT enable ...

Page 12

SERIAL PRESENCE-DETECT MATRIX BYTE DESCRIPTION 0 NUMBER OF SPD BYTES USED 1 TOTAL NUMBER OF BYTES IN SPD DEVICE 2 FUNDAMENTAL MEMORY TYPE 3 NUMBER OF ROW ADDRESSES ON ASSEMBLY 4 NUMBER OF COLUMN ADDRESSES ON ASSEMBLY 5 DIMM HIGHT ...

Page 13

... DA x “SEH01G72A1BH1MT-30” 0x53 0x00 0x00 0xff *RoHs compl. DDR2-667MHz Chip Vendor (Micron) 1 Module Rank Chip Rev. H Page 13 ...

Page 14

Locations Swissbit AG Industriestrasse 4 – – 9552 Bronschhofen Data Sheet Swissbit AG Industriestrasse 4 – – 9552 Bronschhofen Switzerland Phone: +41 (0)71 913 03 03 Fax: +41 (0)71 913 03 15 _____________________________ Swissbit Germany GmbH ...

Related keywords