SEN02G64C4BF2SA-30WR Swissbit NA Inc, SEN02G64C4BF2SA-30WR Datasheet - Page 9

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SEN02G64C4BF2SA-30WR

Manufacturer Part Number
SEN02G64C4BF2SA-30WR
Description
DRAM DDR2 2GB 200-SODIMM
Manufacturer
Swissbit NA Inc
Series
-r
Datasheet

Specifications of SEN02G64C4BF2SA-30WR

Memory Type
DDR2 SDRAM
Memory Size
2GB
Speed
667MHz
Features
-
Package / Case
200-SODIMM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
1052-1042
DDR2 SDRAM COMPONENT ELECTRICAL CHARACTERISTICS AND RECOMMENDED
AC OPERATING CONDITIONS
(0°C ≤ T
AC CHARACTERISTICS
PARAMETER
Clock cycle time
CK high-level width
CK low-level width
Half clock period
Access window (output) of DQ
from CK/CK#
Data-out high-impedance
window from CK/CK#
Data-out low-impedance window
from CK/CK#
DQ and DM input setup time
relative to DQS
DQ and DM input hold time
relative to DQS
DQ and DM input pulse width
( for each input )
Data hold skew factor
DQ-DQS hold, DQS to first DQ
to go non-valid, per access
Data valid output window
DQS input high pulse width
DQS input low pulse width
DQS falling edge to CK rising
- setup time
DQS falling edge from CK rising
- hold time
DQS –DQ skew, DQS to last DQ
valid, per group, per access
DQS read preamble
DQS read postamble
DQS write preamble
DQS write preamble setup time
DQS write postamble
Positive DQS latching edge to
associated clock edge
Write command to first DQS
latching transition
Address and control input pulse
width ( for each input )
Address and control input setup
time
Swissbit AG
Industriestrasse 4
CH-9552 Bronschhofen
CASE
≤ + 85°C; V
CL = 6
CL = 5
CL = 4
CL = 3
DD
Q = +1.8V ± 0.1V, V
S
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WPRE
WPRES
WPST
CK
CK
CK
CK
CH
CL
HP
AC
HZ
LZ
DS
DH
DIPW
QHS
QH
DVW
DQSH
DQSL
DSS
DSH
DQSQ
RPRE
RPST
DQSS
IPW
ISa
(6)
(5)
(4)
(3)
Fon: +41 (0) 71 913 03 03
Fax: +41 (0) 71 913 03 15
t
(t
t
QH
t
HP -
- 0.25
AC
0.125
0.175
-0.40
CH,
t
3.75
0.48
0.48
0.05
0.35
0.35
0.35
0.35
MIN
WL-
3.0-
min
DQSS
2.5
0.2
0.2
0.9
0.4
0.4
0.6
- t
DD
0
-
min
t
6400-666
DQSQ
t
QHS
CL
= +1.8V ± 0.1V)
)
Data Sheet
t
t
+ 0.25
AC
AC
+0.40
MAX
t
WL+
0.52
0.52
8.0-
DQSS
8.0
8.0
0.3
0.2
1.1
0.6
0.6
max
max
-
t
(= t
t
(t
QH
HP -
- 0.25
-0.45
-0.45
CH,
t
3.75
0.45
0.45
0.10
0.30
0.35
0.35
0.35
0.35
MIN
WL-
min
DQSS
3.0
5.0
0.2
0.2
0.9
0.4
0.4
0.6
0.4
AC
- t
0
-
t
5300-555
DQSQ
t
min)
QHS
CL
)
www.swissbit.com
eMail: info@swissbit.com
(= t
(= t
+ 0.25
+0.45
+0.45
+0.45
MAX
WL+
t
0.55
0.55
0.34
0.24
DQSS
AC
AC
8.0
8.0
8.0
1.1
0.6
0.6
+
max)
max)
t
(= t
t
(t
QH
HP -
- 0.25
CH,
-0.50
-0.50
t
3.75
0.45
0.45
0.10
0.35
0.35
0.35
0.35
0.25
MIN
WL-
min
DQSS
5.0
0.2
0.2
0.9
0.4
0.4
0.6
0.5
AC
- t
0
-
-
t
4200-444
t
min)
DQSQ
QHS
CL
)
(= t
(= t
Rev.1.2
+ 0.25
+0.50
+0.50
+0.50
MAX
WL+
t
0.55
0.55
0.30
DQSS
AC
AC
8.0
8.0
0.4
1.1
0.6
0.6
-
-
max)
max)
Unit
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ns
ns
ns
ns
ps
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
30.09.2010
Page 9
of 14

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